9bdb460a97
for paths - Renamed some configuration variables SMP -> CONFIG_SMP MAX_CPUS -> CONFIG_MAX_CPUS MAX_PHYSICAL_CPUS -> CONFIG_MAX_PHYSICAL_CPUS - Removed some dead configuration variables MAX_CPUS -> CONFIG_MAX_CPUS MAX_PHYSICAL_CPUS -> CONFIG_MAX_PHYSICAL_CPUS SMP -> CONFIG_SMP FINAL_MAINBOARD_FIXUP SIO_BASE SIO_SYSTEM_CLK_INPUT NO_KEYBOARD USE_NORMAL_IMAGE SERIAL_CONSOLE USE_ELF_BOOT ENABLE_FIXED_AND_VARIABLE_MTRRS START_CPU_SEG DISABLE_WATCHDOG ENABLE_IOMMU AMD8111_DEV - Removed some assembly files that are no longer needed killed src/southbridge/amd/amd8111/smbus.inc killed src/southbrideg/amd/amd8111/cmos_boot_failover.inc killed src/ram/ramtest.inc - Updates to config.g so that it works more reliably and has initial support for paths - Renamed some configuration variables SMP -> CONFIG_SMP MAX_CPUS -> CONFIG_MAX_CPUS MAX_PHYSICAL_CPUS -> CONFIG_MAX_PHYSICAL_CPUS - Removed some dead configuration variables MAX_CPUS -> CONFIG_MAX_CPUS MAX_PHYSICAL_CPUS -> CONFIG_MAX_PHYSICAL_CPUS SMP -> CONFIG_SMP FINAL_MAINBOARD_FIXUP SIO_BASE SIO_SYSTEM_CLK_INPUT NO_KEYBOARD USE_NORMAL_IMAGE SERIAL_CONSOLE USE_ELF_BOOT ENABLE_FIXED_AND_VARIABLE_MTRRS START_CPU_SEG DISABLE_WATCHDOG ENABLE_IOMMU AMD8111_DEV - Removed some assembly files that are no longer needed killed src/southbridge/amd/amd8111/smbus.inc killed src/southbrideg/amd/amd8111/cmos_boot_failover.inc killed src/ram/ramtest.inc killed src/sdram/generic_dump_spd.inc killed src/sdram/generic_dump_spd.inc - Updated the arima/hdama to build with the new configuration system - Updated config.g to list all of the variables with make echo git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1093 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
107 lines
2.1 KiB
Text
107 lines
2.1 KiB
Text
# Sample config file for Motorola Sandpoint X3 Demo Board with
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# the Arima HDAMA
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# This will make a target directory of ./hdama
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loadoptions
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target hdama
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uses ARCH
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uses CONFIG_COMPRESS
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uses CONFIG_IOAPIC
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uses CONFIG_ROM_STREAM
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uses CONFIG_ROM_STREAM_START
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uses CONFIG_UDELAY_TSC
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uses CPU_FIXUP
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uses FALLBACK_SIZE
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uses HAVE_FALLBACK_BOOT
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uses HAVE_MP_TABLE
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uses HAVE_PIRQ_TABLE
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uses HAVE_HARD_RESET
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uses i586
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uses i686
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uses INTEL_PPRO_MTRR
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uses HEAP_SIZE
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uses IRQ_SLOT_COUNT
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uses k7
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uses k8
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uses MAINBOARD_PART_NUMBER
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uses MAINBOARD_VENDOR
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uses CONFIG_SMP
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uses CONFIG_MAX_CPUS
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uses MEMORY_HOLE
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uses PAYLOAD_SIZE
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uses _RAMBASE
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uses _ROMBASE
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uses ROM_IMAGE_SIZE
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uses ROM_SECTION_OFFSET
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uses ROM_SECTION_SIZE
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uses ROM_SIZE
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uses STACK_SIZE
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uses USE_FALLBACK_IMAGE
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uses USE_OPTION_TABLE
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uses HAVE_OPTION_TABLE
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uses MAXIMUM_CONSOLE_LOGLEVEL
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uses DEFAULT_CONSOLE_LOGLEVEL
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uses CONFIG_CONSOLE_SERIAL8250
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uses MAINBOARD
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uses CONFIG_CHIP_CONFIGURE
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uses XIP_ROM_SIZE
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uses XIP_ROM_BASE
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uses LINUXBIOS_EXTRA_VERSION
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option CONFIG_CHIP_CONFIGURE=1
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option MAXIMUM_CONSOLE_LOGLEVEL=8
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option DEFAULT_CONSOLE_LOGLEVEL=8
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option CONFIG_CONSOLE_SERIAL8250=1
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option CPU_FIXUP=1
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option CONFIG_UDELAY_TSC=0
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option i686=1
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option i586=1
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option INTEL_PPRO_MTRR=1
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option k7=1
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option k8=1
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option ROM_SIZE=524288
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option HAVE_OPTION_TABLE=1
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option CONFIG_ROM_STREAM=1
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option HAVE_FALLBACK_BOOT=1
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###
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### Compute the location and size of where this firmware image
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### (linuxBIOS plus bootloader) will live in the boot rom chip.
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###
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option FALLBACK_SIZE=131072
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## LinuxBIOS C code runs at this location in RAM
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option _RAMBASE=0x00004000
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#
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###
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### Compute the start location and size size of
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### The linuxBIOS bootloader.
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###
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#
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# Arima hdama
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romimage "normal"
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option USE_FALLBACK_IMAGE=0
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option ROM_IMAGE_SIZE=0x10000
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option LINUXBIOS_EXTRA_VERSION=".0Normal"
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mainboard arima/hdama
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payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf
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end
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romimage "fallback"
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option USE_FALLBACK_IMAGE=1
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option ROM_IMAGE_SIZE=0x10000
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option LINUXBIOS_EXTRA_VERSION=".0Fallback"
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mainboard arima/hdama
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payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf
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end
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buildrom ROM_SIZE "normal" "fallback"
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