6b5bc77c9b
Stefan thinks they don't add value. Command used: sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool) The exceptions are for: - crossgcc (patch file) - gcov (imported from gcc) - elf.h (imported from GNU's libc) - nvramtool (more complicated header) The removed lines are: - fmt.Fprintln(f, "/* This file is part of the coreboot project. */") -# This file is part of a set of unofficial pre-commit hooks available -/* This file is part of coreboot */ -# This file is part of msrtool. -/* This file is part of msrtool. */ - * This file is part of ncurses, designed to be appended after curses.h.in -/* This file is part of pgtblgen. */ - * This file is part of the coreboot project. - /* This file is part of the coreboot project. */ -# This file is part of the coreboot project. -# This file is part of the coreboot project. -## This file is part of the coreboot project. --- This file is part of the coreboot project. -/* This file is part of the coreboot project */ -/* This file is part of the coreboot project. */ -;## This file is part of the coreboot project. -# This file is part of the coreboot project. It originated in the - * This file is part of the coreinfo project. -## This file is part of the coreinfo project. - * This file is part of the depthcharge project. -/* This file is part of the depthcharge project. */ -/* This file is part of the ectool project. */ - * This file is part of the GNU C Library. - * This file is part of the libpayload project. -## This file is part of the libpayload project. -/* This file is part of the Linux kernel. */ -## This file is part of the superiotool project. -/* This file is part of the superiotool project */ -/* This file is part of uio_usbdebug */ Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
57 lines
1.4 KiB
C
57 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <console/console.h>
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#include <device/pci_def.h>
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#include <gpio.h>
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#include <intelblocks/lpss.h>
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#include <intelblocks/pcr.h>
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#include <intelblocks/uart.h>
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#include <soc/bootblock.h>
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#include <soc/pci_devs.h>
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#include <soc/pcr_ids.h>
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/* UART pad configuration. Support RXD and TXD for now. */
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const struct uart_gpio_pad_config uart_gpio_pads[] = {
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{
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.console_index = 0,
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.gpios = {
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PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1), /* UART0 RX */
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PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1), /* UART0 TX */
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},
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},
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{
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.console_index = 1,
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.gpios = {
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PAD_CFG_NF(GPP_C12, NONE, DEEP, NF1), /* UART1 RX */
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PAD_CFG_NF(GPP_C13, NONE, DEEP, NF1), /* UART1 TX */
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},
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},
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{
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.console_index = 2,
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.gpios = {
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PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1), /* UART2 RX */
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PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), /* UART2 TX */
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},
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}
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};
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const int uart_max_index = ARRAY_SIZE(uart_gpio_pads);
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DEVTREE_CONST struct device *soc_uart_console_to_device(int uart_console)
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{
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/*
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* if index is valid, this function will return corresponding structure
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* for uart console else will return NULL.
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*/
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switch (uart_console) {
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case 0:
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return pcidev_path_on_root(PCH_DEVFN_UART0);
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case 1:
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return pcidev_path_on_root(PCH_DEVFN_UART1);
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case 2:
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return pcidev_path_on_root(PCH_DEVFN_UART2);
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default:
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printk(BIOS_ERR, "Invalid UART console index\n");
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return NULL;
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}
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}
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