coreboot-kgpe-d16/src/arch/arm64
Furquan Shaikh 9c8cfc5c25 coreboot arm64: Add proper masks for setting SCTLR and SCR regs to 0 at init
Since RES1 and RES0 bits are marked as SBOP(Should-Be-One-or-Preserved) and
SBZP(Should-Be-Zero-or-Preserved) respectively, resetting the SCTLR and SCR
registers should be done with proper bitmask.

BUG=None
BRANCH=None
TEST=Compiles successfully and verified that the RES bits are preserved across
register writes.

Original-Change-Id: I5094ba7e51e8ea6f7d7612ba4d11b10dcbdb1607
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/207815
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
(cherry picked from commit dfb196b4063e4f94d1ba9d5e2d19bae624ed46b3)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: I033a68b723fea83817aaa6402b86c78abd3e1da9
Reviewed-on: http://review.coreboot.org/8592
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@google.com>
Tested-by: build bot (Jenkins)
2015-03-05 17:32:08 +01:00
..
armv8 arm64: use one stage_entry for all stages 2015-03-04 20:00:18 +01:00
include arm64: use one stage_entry for all stages 2015-03-04 20:00:18 +01:00
boot.c arm64: Prepare ARM64 for building 2015-01-26 11:41:06 +01:00
bootblock.ld arm64: use one stage_entry for all stages 2015-03-04 20:00:18 +01:00
cpu.c coreboot arm64: Add support for arm64 into coreboot framework 2014-09-23 18:10:32 +02:00
div0.c coreboot arm64: Add support for arm64 into coreboot framework 2014-09-23 18:10:32 +02:00
eabi_compat.c coreboot arm64: Add support for arm64 into coreboot framework 2014-09-23 18:10:32 +02:00
id.S coreboot arm64: Add support for arm64 into coreboot framework 2014-09-23 18:10:32 +02:00
Kconfig vboot2: add verstage 2015-01-27 01:41:40 +01:00
Makefile.inc arm64: remove assembly code string functions 2015-03-04 20:04:18 +01:00
ramstage.ld arm64: Set 16 byte alignment and ramstage start address 2015-03-04 20:04:46 +01:00
romstage.ld arm64: use one stage_entry for all stages 2015-03-04 20:00:18 +01:00
stage_entry.S coreboot arm64: Add proper masks for setting SCTLR and SCR regs to 0 at init 2015-03-05 17:32:08 +01:00
stages.c arm64: use one stage_entry for all stages 2015-03-04 20:00:18 +01:00
tables.c CBMEM: Implement cbmem_run_init_hooks() stub 2015-01-27 22:41:23 +01:00
timestamp.c coreboot arm64: Add support for arm64 into coreboot framework 2014-09-23 18:10:32 +02:00