coreboot-kgpe-d16/src/mainboard/siemens
Mario Scheithauer 9ca43191ab siemens/mc_apl2: Change SERIRQ mode
Because of Intel's faulty LPC clock, the SERIRQ mode must be corrected.
By removing this entry from devicetree, the default value (quiet mode)
is used. The problem is described in Intel document 334820-007 under
point APL47.

Change-Id: I7a45e0e5fcde17a20abd19a33282b8a9215b1480
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/31138
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-01-30 11:01:01 +00:00
..
mc_apl1 siemens/mc_apl2: Change SERIRQ mode 2019-01-30 11:01:01 +00:00
mc_bdx1 device: Use pcidev_on_root() 2019-01-06 01:17:54 +00:00
mc_tcu3 arch/x86: Drop spurious arch/stages.h includes 2018-12-28 06:47:31 +00:00
Kconfig
Kconfig.name