9ea7bff22e
This should eventually go, as fadt seems to be better put into the southbridge - Add config flag for boards that have get_bus_conf.c Might be cleaned out as well, no idea - Use flags where appropriate. - Move the following rules to src/arch/i386/Makefile.inc: - fadt.o - dsdt.o - acpi_tables.o - get_bus_conf.o - Rename objs_dsl_template in toplevel Makefile to the more appropriate objs_asl_template - Remove all Makefiles that are empty now, which includes src/mainboard/Makefile.k8_CAR.inc and src/mainboard/Makefile.k8_ck804.inc and the include statements that used these files. - Add workaround to intel/xe7501devkit: It uses ACPI in an unusual way: It adds a MADT, but no DSDT. As this is highly unusual, I didn't want to add explicit support for that scenario (and encourage such uses that way), and added a dummy dsdt.asl instead. It will be linked to dsdt.o, but not linked into the final binary. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5171 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
115 lines
2.1 KiB
Text
115 lines
2.1 KiB
Text
config BOARD_TECHNEXION_TIM8690
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bool "TIM-8690"
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select ARCH_X86
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select CPU_AMD_SOCKET_S1G1
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select NORTHBRIDGE_AMD_AMDK8
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select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
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select SOUTHBRIDGE_AMD_RS690
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select SOUTHBRIDGE_AMD_SB600
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select SUPERIO_ITE_IT8712F
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select BOARD_HAS_FADT
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select HAVE_BUS_CONFIG
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select HAVE_PIRQ_TABLE
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select HAVE_MP_TABLE
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select USE_PRINTK_IN_CAR
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select USE_DCACHE_RAM
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select HAVE_HARD_RESET
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select SB_HT_CHAIN_UNITID_OFFSET_ONLY
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select WAIT_BEFORE_CPUS_INIT
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select HAVE_ACPI_TABLES
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select BOARD_ROMSIZE_KB_512
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config MAINBOARD_DIR
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string
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default technexion/tim8690
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depends on BOARD_TECHNEXION_TIM8690
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config DCACHE_RAM_BASE
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hex
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default 0xc8000
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depends on BOARD_TECHNEXION_TIM8690
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config DCACHE_RAM_SIZE
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hex
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default 0x08000
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depends on BOARD_TECHNEXION_TIM8690
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config DCACHE_RAM_GLOBAL_VAR_SIZE
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hex
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default 0x01000
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depends on BOARD_TECHNEXION_TIM8690
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config APIC_ID_OFFSET
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hex
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default 0x0
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depends on BOARD_TECHNEXION_TIM8690
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config LB_CKS_RANGE_END
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int
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default 122
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depends on BOARD_TECHNEXION_TIM8690
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config LB_CKS_LOC
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int
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default 123
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depends on BOARD_TECHNEXION_TIM8690
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config MAINBOARD_PART_NUMBER
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string
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default "TIM-8690"
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depends on BOARD_TECHNEXION_TIM8690
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config HW_MEM_HOLE_SIZEK
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hex
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default 0x100000
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depends on BOARD_TECHNEXION_TIM8690
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config MAX_CPUS
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int
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default 2
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depends on BOARD_TECHNEXION_TIM8690
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config MAX_PHYSICAL_CPUS
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int
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default 1
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depends on BOARD_TECHNEXION_TIM8690
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config HW_MEM_HOLE_SIZE_AUTO_INC
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bool
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default n
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depends on BOARD_TECHNEXION_TIM8690
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config SB_HT_CHAIN_ON_BUS0
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int
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default 1
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depends on BOARD_TECHNEXION_TIM8690
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config HT_CHAIN_END_UNITID_BASE
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hex
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default 0x1
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depends on BOARD_TECHNEXION_TIM8690
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config HT_CHAIN_UNITID_BASE
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hex
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default 0x0
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depends on BOARD_TECHNEXION_TIM8690
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config USE_INIT
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bool
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default n
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depends on BOARD_TECHNEXION_TIM8690
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config IRQ_SLOT_COUNT
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int
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default 11
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depends on BOARD_TECHNEXION_TIM8690
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config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
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hex
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default 0x1022
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depends on BOARD_TECHNEXION_TIM8690
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config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
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hex
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default 0x3050
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depends on BOARD_TECHNEXION_TIM8690
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