coreboot-kgpe-d16/src/northbridge
Patrick Rudolph 9f3f9154c9 nb/intel/sandybridge/romstage: Read fuse bits for max MEM Clk
Instead of hardcoding the maximum supported DDR frequency to
800Mhz (DDR3-1600), read the fuse bits that encode this information.

Test system:
 * Intel IvyBridge
 * Gigabyte GA-B75M-D3H

Change-Id: I515a2695a490f16aeb946bfaf3a1e860c607cba9
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/13487
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-02 21:46:49 +01:00
..
amd nb/amd/amdmct: Add socket specific configuration for FM2 2016-02-19 21:27:35 +01:00
dmp/vortex86ex tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
intel nb/intel/sandybridge/romstage: Read fuse bits for max MEM Clk 2016-03-02 21:46:49 +01:00
rdc/r8610 tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
via drivers/pc80: Add PS/2 mouse presence detect 2016-02-01 22:10:46 +01:00