Lee Leahy 9fd0895cb4 soc/intel/quark: Enable ESRAM ... The Quark SoC uses ESRAM instead of cache-as-RAM. This code requires that utils/xcompile/xcompile change the machine architecture from i686 to i586 to ensure that the Quark does not attempt to execute unsupported instructions: * Adjust Makefile.inc to add the RMU to the coreboot image * Add code to enable the ESRAM Directly use the QuarkSocPkg/QuarkNorthCluster/Include/QuarkNcSocId.h file from the EDK2 tree (https://github.com/tianocore/edk2.git) to enable easy differences and correct issues in coreboot that were found in EDK2. Testing on Galileo: * Edit the src/mainboard/intel/galileo/Makefile.inc file * Add "select ADD_RMU_FILE" * Place the rmu.bin file in the location specified by CONFIG_RMU_FILE * Remove power from the board * Apply power to the board * Testing is successful if the SD LED is on indicating that the end of esram_init.inc was reached Change-Id: I91d919da144bb72a5d4c4a8050ffab256632a395 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/13440 Tested-by: build bot (Jenkins) Reviewed-by: FEI WANG <wangfei.jimei@gmail.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2016-02-08 20:15:05 +01:00
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include/soc	soc/intel/quark: Enable ESRAM	2016-02-08 20:15:05 +01:00
romstage	soc/intel/quark: Enable ESRAM	2016-02-08 20:15:05 +01:00
Kconfig	soc/intel/quark: Enable ESRAM	2016-02-08 20:15:05 +01:00
Makefile.inc	soc/intel/quark: Enable ESRAM	2016-02-08 20:15:05 +01:00
memmap.c	soc/intel/quark: Enable ESRAM	2016-02-08 20:15:05 +01:00