Kenneth Chan 9fe2ce802a mb/google/guybrush/var/dewatt: update USB 2.0 Lane Parameter settings for USB ports ... Tune the USB phy settings to update txpreempamptune to 3 and txvreftune to 6 for passing USB 2.0 SI Eye diagram measurement (port 0/1/4). BUG=b:199468920 TEST= emerge-guybrush coreboot; pass USB 2.0 SI Eye diagram measurement. Signed-off-by: Kenneth Chan <kenneth.chan@quanta.corp-partner.google.com> Change-Id: Ie46c9019186f1893d736fc2806ab74a4f1171be7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60239 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Rob Barnes <robbarnes@google.com>		2021-12-23 14:32:20 +00:00
..
acpi	acpi,Makefile: Add preload_acpi_dsdt	2021-11-29 20:35:33 +00:00
arch	arch/x86: Init firmware pointer for EC SMSC KBC1098/KBC1126 at build time	2021-12-21 18:13:45 +00:00
commonlib	commonlib: Add new TS for CSE firmware Sync	2021-12-20 17:51:27 +00:00
console	src/acpi to src/lib: Fix spelling errors	2021-10-05 18:06:39 +00:00
cpu	cpu/x86/mp_init.c: Make it work for !CONFIG_SMP	2021-12-10 15:57:34 +00:00
device	device: Make pciexp_get_ltr_max_latencies a public function	2021-12-22 18:14:47 +00:00
drivers	drivers/generic/bayhub_lv2: Work around known errata	2021-12-22 18:41:39 +00:00
ec	arch/x86: Init firmware pointer for EC SMSC KBC1098/KBC1126 at build time	2021-12-21 18:13:45 +00:00
include	device: Make pciexp_get_ltr_max_latencies a public function	2021-12-22 18:14:47 +00:00
lib	lib/Makefile.inc: Remove effect-free line	2021-12-23 12:14:17 +00:00
mainboard	mb/google/guybrush/var/dewatt: update USB 2.0 Lane Parameter settings for USB ports	2021-12-23 14:32:20 +00:00
northbridge	nb/intel/ironlake: Use `NUM_CHANNELS` macro	2021-12-23 14:31:53 +00:00
security	Revert "security/vboot: Add NVRAM counter for TPM 2.0"	2021-12-16 20:58:30 +00:00
soc	soc/intel/alderlake: remove SOC_INTEL_COMMON_BLOCK_SMM_LOCK_GPIO_PADS	2021-12-22 15:40:25 +00:00
southbridge	sb/intel/lynxpoint: Update `intel_me_status()` signature	2021-12-18 12:55:20 +00:00
superio	superio/smsc/sch5545: Disable PS/2 lines isolation during init	2021-11-27 14:23:08 +00:00
vendorcode	Revert "vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2471_02"	2021-12-21 05:49:40 +00:00
Kconfig	Kconfig: Show console DEBUG_FUNC if OVERRIDE_LOGLEVEL is set	2021-11-13 00:20:11 +00:00