Stefan Reinauer 9fe4d797a3 coreboot used to have two different "APIs" for memory accesses: ... read32(unsigned long addr) vs readl(void *addr) and write32(unsigned long addr, uint32_t value) vs writel(uint32_t value, void *addr) read32 was only available in __PRE_RAM__ stage, while readl was used in stage2. Some unclean implementations then made readl available to __PRE_RAM__ too which results in really messy includes and code. This patch fixes all code to use the read32/write32 variant, so that we can remove readl/writel in another patch. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5022 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1		2010-01-16 17:53:38 +00:00
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amd	coreboot used to have two different "APIs" for memory accesses:	2010-01-16 17:53:38 +00:00
intel	* drop reset files from 945 mainboards (and use southbridge specific reset)	2010-01-16 16:35:38 +00:00
via	Remove drivers/pci/onboard. The only purpose was for option ROMs, which are	2009-11-06 23:42:26 +00:00
Kconfig	Drop remainders of PPC port	2009-10-28 19:40:46 +00:00
Makefile.inc	Drop remainders of PPC port	2009-10-28 19:40:46 +00:00