Aaron Durbin a0a3727dbb intel/cpu: rename car.h to romstage.h ... This header has nothing to do with cache-as-ram. Therefore, 'car' is the wrong term to use. It is about providing a prototype for *romstage*. Change-Id: Ibc5bc6f3c38e74d6337c12f246846853ceae4743 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/6661 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>		2014-08-15 03:44:46 +02:00
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dl145_g1	mainboard: Trivial - drop trailing blank lines at EOF	2014-07-18 14:42:47 +02:00
dl145_g3	Kconfig: do not set SB_HT_CHAIN_ON_BUS0 twice to the same value	2014-08-12 09:02:45 +02:00
dl165_g6_fam10	Kconfig: do not set SB_HT_CHAIN_ON_BUS0 twice to the same value	2014-08-12 09:02:45 +02:00
e_vectra_p2706t	intel/cpu: rename car.h to romstage.h	2014-08-15 03:44:46 +02:00
pavilion_m6_1035dx	mainboard/amd: De-ASCIIartify AGESA board headers	2014-08-06 15:36:12 +02:00
Kconfig	mainboard/hp: Add initial support for Pavilion m6-1035dx	2014-03-28 20:59:57 +01:00