coreboot-kgpe-d16/src/mainboard/google/falco/dsdt.asl
Duncan Laurie b3b008a9b6 falco: Add ACPI code to describe the I2C touchpad device
If the SerialIO devices are put into ACPI mode then it is possible
to use ACPI to instantiate the touchpad in the kernel without
needing to have a platform level driver to do the binding.

This is the "new way" of describing on-board I2C devices and the
upstream kernel is starting to add ACPI IDs to drivers so they can
be used in this fashion.  For the Cypress touchpad use a generic
ACPI ID of "CYPA0000" to describe it.

In order to support the proper scoping of the touchpad device under
the appropriate I2C controller device the mainboard.asl file needs
to be included after pch.asl so the I2C device exists.

Change-Id: I81e053d27be478f3a19b6f9b13cd2b4fabcb88c0
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/5194
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-02-12 23:31:45 +01:00

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/*
* This file is part of the coreboot project.
*
* Copyright (C) 2007-2009 coresystems GmbH
* Copyright (C) 2012 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#define ENABLE_TPM
DefinitionBlock(
"dsdt.aml",
"DSDT",
0x02, // DSDT revision: ACPI v2.0
"COREv4", // OEM id
"COREBOOT", // OEM table id
0x20110725 // OEM revision
)
{
// Some generic macros
#include "acpi/platform.asl"
// global NVS and variables
#include <southbridge/intel/lynxpoint/acpi/globalnvs.asl>
// General Purpose Events
//#include "acpi/gpe.asl"
// CPU
#include <cpu/intel/haswell/acpi/cpu.asl>
Scope (\_SB) {
Device (PCI0)
{
#include <northbridge/intel/haswell/acpi/haswell.asl>
#include <southbridge/intel/lynxpoint/acpi/pch.asl>
}
}
// Mainboard specific
#include "acpi/mainboard.asl"
// Thermal handler
#include "acpi/thermal.asl"
// Chrome OS specific
#include "acpi/chromeos.asl"
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
// Chipset specific sleep states
#include <southbridge/intel/lynxpoint/acpi/sleepstates.asl>
}