d3ae4f1364
The standard uart8250mem_32 driver is now usable on ARM, so use it. BUG=none BRANCH=none TEST=see that serial firmware builds still log on serial in all stages on veyron_minnie. Also verified that a 9600 baud console is functional. Change-Id: I653b70a0d51a8d136e1da17537988f5b33c7a160 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: fa27c60fd38002775072d11fca431d4788b4d1d7 Original-Change-Id: I047d74ac2d5c311f303955e62391114e16ec087a Original-Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/337551 Original-Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Original-Tested-by: Patrick Georgi <pgeorgi@chromium.org> Original-Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://review.coreboot.org/14319 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
26 lines
513 B
Text
26 lines
513 B
Text
config SOC_ROCKCHIP_RK3399
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bool
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default n
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select ARCH_BOOTBLOCK_ARMV8_64
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select ARCH_RAMSTAGE_ARMV8_64
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select ARCH_ROMSTAGE_ARMV8_64
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select ARCH_VERSTAGE_ARMV8_64
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select ARM64_A53_ERRATUM_843419
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select BOOTBLOCK_CONSOLE
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select DRIVERS_UART_8250MEM_32
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select GENERIC_UDELAY
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select HAVE_MONOTONIC_TIMER
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select UNCOMPRESSED_RAMSTAGE
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if SOC_ROCKCHIP_RK3399
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config CHROMEOS
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select RETURN_FROM_VERSTAGE
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select SEPARATE_VERSTAGE
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select VBOOT_STARTS_IN_BOOTBLOCK
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config PMIC_BUS
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int
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default -1
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endif
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