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Subrata Banik a260215a64 device/oprom: List all supported vesa mode by oprom
This patch lists all supported vesa mode by oprom
using Function 0x4F00 (return vbe controller information).
This information might be useful for user to select correct vesa
mode for oprom.

TEST=Enabling external pcie based graphics card on ICLRVP

Case 1: with unsupported vesa mode 0x118

Now coreboot will show below msg to user to know there is a potential
issue with choosen vesa mode and better users know the failure rather
going to depthcharge and debug further.

Calling Option ROM...
... Option ROM returned.
VBE: Getting information about VESA mode 4118
VBE: Function call invalid with unsupported video mode 0x118!
User to select mode from below list -
Supported Video Mode list for OpRom are:
0x110
0x111
0x113
0x114
0x116
0x117
0x119
0x11a
0x165
0x166
0x121
0x122
0x123
0x124
0x145
0x146
0x175
0x176
0x1d2
0x1d4

Error: In vbe_get_mode_info function

Case 2: with supported vesa mode 0x116

Calling Option ROM...
... Option ROM returned.
VBE: Getting information about VESA mode 4116
VBE: resolution:  1024x768@16
VBE: framebuffer: a0000000
VBE: Setting VESA mode 4116
VGA Option ROM was run

Change-Id: I02cba44374bc50ec3ec2819c97b6f5027c58387f
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34284
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-07-19 17:11:07 +00:00
3rdparty 3rdparty/fsp: Update submodule pointer 2019-07-02 16:11:03 +00:00
Documentation Documentation/code_of_conduct: Update arbitration team 2019-07-19 16:37:51 +00:00
configs configs/lenovo: Drop DEBUG_SMM_RELOCATION 2019-07-15 04:49:09 +00:00
payloads payloads/GRUB: Use correct script name in Makefile 2019-07-19 09:34:03 +00:00
src device/oprom: List all supported vesa mode by oprom 2019-07-19 17:11:07 +00:00
util sb/intel/{bd82x6x|ibexpeak}: Drop p_cnt_throttling_supported 2019-07-19 15:06:23 +00:00
.checkpatch.conf .checkpatch.conf: Ignore a few more warnings 2018-08-13 12:23:24 +00:00
.clang-format lint/clang-format: set to 96 chars per line 2019-06-13 20:14:00 +00:00
.gitignore util/bucts: Add tool to manipulate BUC.TS bit on Intel targets 2018-11-19 08:19:16 +00:00
.gitmodules Add intel-microcode submodule repository 2019-06-18 10:42:17 +00:00
.gitreview
COPYING
MAINTAINERS MAINTAINERS: Add arbitration board members for the code of conduct 2019-07-19 16:38:23 +00:00
Makefile site-local: Allow to read Makefile.inc w/o .config 2019-07-17 16:05:04 +00:00
Makefile.inc Makefile.inc: Enable -Wimplicit-fallthrough 2019-07-19 09:58:05 +00:00
README.md README: Convert to Markdown 2018-09-16 13:01:58 +00:00
gnat.adc
toolchain.inc Move -Wlogical-op into xcompile 2019-06-21 08:44:49 +00:00

README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of "unusual" things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that's worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • doxygen (for generating/viewing documentation)
  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.