coreboot-kgpe-d16/src/soc
Ronak Kanabar a360aad2bc soc/intel/jasperlake: use UDK_202005_BINDING
JSL FSP support FSP 2.2. FSP 2.2 introduces Multiphase SI init
support through the FSP-S arch UPD. The FSP-S arch UPD structure
is added in edk2 stable 2020 branch. Switching the support for
JSL to edk2-stable202005 to intercept the FSP2.2 related support.

BUG=b:162184827
BRANCH=None
TEST=Build and boot JSLRVP

Cq-Depend: chrome-internal:3221772
Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com>
Change-Id: Ieed1b58e491d5a89043c418f0f44f2ee9af111f5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44576
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-08-24 09:18:54 +00:00
..
amd soc/amd/picasso: Store ddr_frequency in MT/s 2020-08-24 09:13:54 +00:00
cavium src: Remove unused 'include <types.h>' 2020-07-14 16:10:17 +00:00
intel soc/intel/jasperlake: use UDK_202005_BINDING 2020-08-24 09:18:54 +00:00
mediatek src: Remove unused 'include <delay.h>' 2020-08-18 12:19:18 +00:00
nvidia src: Remove unused 'include <stddef.h> 2020-08-18 12:15:44 +00:00
qualcomm src: Remove unused 'include <delay.h>' 2020-08-18 12:19:18 +00:00
rockchip src/soc/rockchip: Add missing <{stddef,stdint}.h> 2020-07-29 09:37:22 +00:00
samsung src/soc/samsung/exynos{5250,s5420}: Add missing <{stddef,stdint}.h> 2020-07-29 09:34:55 +00:00
sifive soc/sifive: Drop unneeded empty lines 2020-08-24 09:16:48 +00:00
ti cpu/ti/am335x: Move from cpu to soc in tree 2020-08-19 07:17:37 +00:00
ucb soc/ucb/riscv: Add chip_operations stub 2020-05-28 09:30:35 +00:00