112 lines
4.2 KiB
C
112 lines
4.2 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright 2014 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __SRC_INCLUDE_GPIO_H__
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#define __SRC_INCLUDE_GPIO_H__
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#include <soc/gpio.h>
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#include <types.h>
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/* <soc/gpio.h> must typedef a gpio_t that fits in 32 bits. */
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_Static_assert(sizeof(gpio_t) <= sizeof(u32), "gpio_t doesn't fit in lb_gpio");
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/* The following functions must be implemented by SoC/board code. */
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int gpio_get(gpio_t gpio);
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void gpio_set(gpio_t gpio, int value);
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void gpio_input_pulldown(gpio_t gpio);
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void gpio_input_pullup(gpio_t gpio);
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void gpio_input(gpio_t gpio);
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void gpio_output(gpio_t gpio, int value);
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int _gpio_base3_value(gpio_t gpio[], int num_gpio, int binary_first);
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/*
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* This function may be implemented by SoC/board code to provide
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* a mapping from a GPIO pin to controller by returning the ACPI
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* path for the controller that owns this GPIO.
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*
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* If not implemented the default handler will return NULL.
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*/
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const char *gpio_acpi_path(gpio_t gpio);
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/*
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* This function may be implemented by SoC/board code to provide
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* a mapping from the internal representation of a GPIO to the 16bit
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* value used in an ACPI GPIO pin table entry.
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*
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* If not implemented by the SOC the default handler will return 0
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* because the underlying type of gpio_t is unknown.
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*/
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uint16_t gpio_acpi_pin(gpio_t gpio);
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/*
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* Read the value presented by the set of GPIOs, when each pin is interpreted
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* as a base-2 digit (LOW = 0, HIGH = 1).
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*
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* gpio[]: pin positions to read. gpio[0] is less significant than gpio[1].
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* num_gpio: number of pins to read.
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*
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* There are also pulldown and pullup variants which default each gpio to
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* be configured with an internal pulldown and pullup, respectively.
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*/
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int gpio_base2_value(gpio_t gpio[], int num_gpio);
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int gpio_pulldown_base2_value(gpio_t gpio[], int num_gpio);
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int gpio_pullup_base2_value(gpio_t gpio[], int num_gpio);
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/*
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* Read the value presented by the set of GPIOs, when each pin is interpreted
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* as a base-3 digit (LOW = 0, HIGH = 1, Z/floating = 2).
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* Example: X1 = Z, X2 = 1 -> gpio_base3_value({GPIO(X1), GPIO(X2)}) = 5
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* BASE3() from <base3.h> can generate numbers to compare the result to.
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*
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* gpio[]: pin positions to read. gpio[0] is less significant than gpio[1].
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* num_gpio: number of pins to read.
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*/
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static inline int gpio_base3_value(gpio_t gpio[], int num_gpio)
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{
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return _gpio_base3_value(gpio, num_gpio, 0);
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}
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/*
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* Read the value presented by the set of GPIOs, when each pin is interpreted
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* as a base-3 digit (LOW = 0, HIGH = 1, Z/floating = 2) in a non-standard
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* ternary number system where the first 2^n natural numbers are represented
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* as they would be in a binary system (without any Z digits), and the following
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* 3^n-2^n numbers use the remaining ternary representations in the normal
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* ternary system order (skipping the values that were already used up).
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* This is useful for boards which initially used a binary board ID and later
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* decided to switch to tri-state after some revisions have already been built.
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* Example: For num_gpio = 2 we get the following representation:
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*
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* Number X1 X0
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* 0 0 0
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* 1 0 1
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* 2 1 0
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* 3 1 1 // Start counting ternaries back at 0 after this
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* 4 0 2 // Skipping 00 and 01 which are already used up
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* 5 1 2 // Skipping 10 and 11 which are already used up
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* 6 2 0
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* 7 2 1
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* 8 2 2
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*
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* gpio[]: pin positions to read. gpio[0] is less significant than gpio[1].
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* num_gpio: number of pins to read.
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*/
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static inline int gpio_binary_first_base3_value(gpio_t gpio[], int num_gpio)
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{
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return _gpio_base3_value(gpio, num_gpio, 1);
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}
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#endif /* __SRC_INCLUDE_GPIO_H__ */
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