ce952652a1
the board. I thought we did this ages ago. Also push CAR BASE further down so it won't conflict with a 32mbit flash part. Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6299 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
21 lines
310 B
Text
21 lines
310 B
Text
config CPU_INTEL_SOCKET_441
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bool
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if CPU_INTEL_SOCKET_441
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config SOCKET_SPECIFIC_OPTIONS # dummy
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def_bool y
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select CPU_INTEL_MODEL_106CX
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select MMX
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select SSE
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select CACHE_AS_RAM
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config DCACHE_RAM_BASE
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hex
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default 0xffaf8000
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config DCACHE_RAM_SIZE
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hex
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default 0x8000
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endif # CPU_INTEL_SOCKET_441
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