coreboot-kgpe-d16/src/mainboard/asus/m2n-e
Jonathan A. Kollasch ec505ad21c azalia: fix up and clean up shrinkage of boilerplate code
Should fix regression in HDA verb setup on nvidia mcp55 and intel sch
southbridges.  The mcp55 code could not find the mainboard's verb table
because the table was not even being compiled in.  The sch boards appeared
to have the same issue.

Intel broadwell and fsp_bd82x6x seemed to have not gotten the boilerplate
shrink, so apply it to those too.

Followup-to: Ib3e09644c0ee71aacb067adaa85653d151b52078
             (azalia: Shrink boilerplate)

Change-Id: If7aae69f5171db67055ffe220bdff392caaa5d9f
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-on: http://review.coreboot.org/10826
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-07-14 13:40:07 +02:00
..
board_info.txt src/mainboard/*/*/board_info.txt: Added Release year for boards 2015-04-23 14:42:44 +02:00
cmos.layout Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
devicetree.cb Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
fanctl.c Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
get_bus_conf.c Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
hda_verb.c azalia: fix up and clean up shrinkage of boilerplate code 2015-07-14 13:40:07 +02:00
Kconfig PCI subsystem: Drop PCI_64BIT_PREF_MEM option 2015-06-10 05:48:37 +02:00
Kconfig.name kconfig: automatically include mainboards 2015-04-18 08:31:08 +02:00
mainboard.c Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
Makefile.inc Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
mptable.c Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
resourcemap.c Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
romstage.c Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00