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Duncan Laurie a51815119f hardwaremain: Move init_timer() call to before console init
The 8250 MMIO uart driver calls udelay, and if that is the first
call then it will also call printk in init_timer() which can result
in a deadlock trying to acquire the console lock.

There are a few options to prevent this:
1) remove the printk in init_timer which removes a useful debug message
2) change the udelay() to cpu_relax() in uart8250mem.c
3- move the init_timer() call in ramstage main() to be called earlier

Since hardwaremain.c:main() already has an explicit call to init_timer()
on x86 it is an easy change to move this to happen before the console
is initialized.

BUG=chrome-os-partner:40857
BRANCH=none
TEST=boot on glados with serial output through ramstage

Change-Id: I8a8d8cccdd0b53de9de44600076bfad75e4f5514
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 744610f72628a944582925933b286f65bde630d9
Original-Change-Id: Ic1fdafaea5541c6d7b1bb6f15399c759f484aa74
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/275157
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/10698
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
2015-06-30 08:11:16 +02:00
3rdparty arm-trusted-firmware: update marker 2015-06-23 22:27:14 +02:00
Documentation Remove empty lines at end of file 2015-06-08 00:55:07 +02:00
payloads libpayload: add UDC driver for Designware controller 2015-06-30 08:09:49 +02:00
src hardwaremain: Move init_timer() call to before console init 2015-06-30 08:11:16 +02:00
util cbfstool: Handle elf with different virtual and physical address 2015-06-30 08:09:58 +02:00
.gitignore gitignore: Have multiple crossgcc versions 2015-05-25 21:26:02 +02:00
.gitmodules submodules: add arm-trusted-firmware third-party repository 2015-06-23 08:20:24 +02:00
.gitreview add .gitreview 2012-11-01 23:13:39 +01:00
COPYING
MAINTAINERS MAINTAINERS: grab build system responsibility 2015-05-22 22:47:03 +02:00
Makefile fix doxy target in root Makefile 2015-06-07 02:51:47 +02:00
Makefile.inc gitconfig: set up hooks and target for 3rdparty/blobs 2015-06-23 18:44:19 +02:00
README Update README with newer version of the text from the web page 2011-06-15 10:16:33 +02:00
toolchain.inc toolchain.inc: Add x86-64 support 2015-06-16 02:47:10 +02:00

README

-------------------------------------------------------------------------------
coreboot README
-------------------------------------------------------------------------------

coreboot is a Free Software project aimed at replacing the proprietary BIOS
(firmware) found in most computers.  coreboot performs a little bit of
hardware initialization and then executes additional boot logic, called a
payload.

With the separation of hardware initialization and later boot logic,
coreboot can scale from specialized applications that run directly
firmware, run operating systems in flash, load custom
bootloaders, or implement firmware standards, like PC BIOS services or
UEFI. This allows for systems to only include the features necessary
in the target application, reducing the amount of code and flash space
required.

coreboot was formerly known as LinuxBIOS.


Payloads
--------

After the basic initialization of the hardware has been performed, any
desired "payload" can be started by coreboot.

See http://www.coreboot.org/Payloads for a list of supported payloads.


Supported Hardware
------------------

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

 * http://www.coreboot.org/Supported_Motherboards
 * http://www.coreboot.org/Supported_Chipsets_and_Devices


Build Requirements
------------------

 * gcc / g++
 * make

Optional:

 * doxygen (for generating/viewing documentation)
 * iasl (for targets with ACPI support)
 * gdb (for better debugging facilities on some targets)
 * ncurses (for 'make menuconfig')
 * flex and bison (for regenerating parsers)


Building coreboot
-----------------

Please consult http://www.coreboot.org/Build_HOWTO for details.


Testing coreboot Without Modifying Your Hardware
------------------------------------------------

If you want to test coreboot without any risks before you really decide
to use it on your hardware, you can use the QEMU system emulator to run
coreboot virtually in QEMU.

Please see http://www.coreboot.org/QEMU for details.


Website and Mailing List
------------------------

Further details on the project, a FAQ, many HOWTOs, news, development
guidelines and more can be found on the coreboot website:

  http://www.coreboot.org

You can contact us directly on the coreboot mailing list:

  http://www.coreboot.org/Mailinglist


Copyright and License
---------------------

The copyright on coreboot is owned by quite a large number of individual
developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL).
Some files are licensed under the "GPL (version 2, or any later version)",
and some files are licensed under the "GPL, version 2". For some parts, which
were derived from other projects, other (GPL-compatible) licenses may apply.
Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.