coreboot-kgpe-d16/src
Angel Pons a634dab1a6 skylake boards: Factor out copy-pasted PIRQ routes
Put them in common code just in case something depends on the values.

Change-Id: Ief526efcbd5ba5546572da1bc6bb6d86729f4e54
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43851
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Michael Niewöhner
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-26 20:54:32 +00:00
..
acpi src: Use ACPI macros 2020-07-21 18:26:47 +00:00
arch src: Make HAVE_CF9_RESET set the FADT reset register 2020-07-20 13:23:13 +00:00
commonlib src: Remove unused 'include <stdint.h> 2020-07-14 16:11:10 +00:00
console console: Update for vboot before bootblock 2020-06-15 22:07:12 +00:00
cpu cpu/intel/model_206ax: Clean up includes 2020-07-26 18:45:21 +00:00
device device/pci_device.c: Do not complain about disabled devices 2020-07-24 23:12:07 +00:00
drivers src: Remove unused include <cpu/x86/smm.h> 2020-07-26 18:45:00 +00:00
ec ec/system76_ec: add support for System76 EC 2020-07-23 09:30:22 +00:00
include device/device.h: Add `is_dev_enabled` function 2020-07-26 20:44:36 +00:00
lib src: Remove unused 'include <types.h>' 2020-07-14 16:10:17 +00:00
mainboard skylake boards: Factor out copy-pasted PIRQ routes 2020-07-26 20:54:32 +00:00
northbridge nb/intel/ironlake/raminit.c: initialize 'reply.command' 2020-07-25 01:23:49 +00:00
security security/intel/stm: Add missing <stdbool.h> 2020-07-21 20:04:12 +00:00
soc skylake boards: Factor out copy-pasted PIRQ routes 2020-07-26 20:54:32 +00:00
southbridge sb/intel/bd82x6x: Use common irqlinks.asl 2020-07-25 00:12:06 +00:00
superio superio/common: Avoid NULL pointer dereference 2020-07-24 21:21:09 +00:00
vendorcode amd/picasso: rework USB2 PHY tune parameter handling 2020-07-26 17:08:00 +00:00
Kconfig arch/x86: Remove RELOCATABLE_RAMSTAGE 2020-07-06 06:17:47 +00:00