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Carl-Daniel Hailfinger a6941beb43 Flashrom did not use the read function for verifying, it used direct memory 
access instead. That fails if the flash chip is not mapped completely.
If the read function is set in struct flashchip, use it for verification
as well.

This fixes verification of all SPI flash chips >512 kByte behind an
IT8716F flash translation chip.

"MX25L8005 found at physical address 0xfff00000.
Flash part is MX25L8005 (1024 KB).
Flash image seems to be a legacy BIOS. Disabling checks.
Verifying flash... VERIFIED."

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Harald Gutmann <harald.gutmann@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3070 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 		2008-01-22 15:19:01 +00:00
documentation Rename almost all occurences of LinuxBIOS to coreboot. 2008-01-18 15:08:58 +00:00
src rename linuxbios_* files, too. 2008-01-18 16:16:45 +00:00
targets last try i hope. Building with a payload changes the result of the rom 2008-01-20 01:59:43 +00:00
util Flashrom did not use the read function for verifying, it used direct memory 2008-01-22 15:19:01 +00:00
COPYING update license template. 2006-08-12 22:03:36 +00:00
NEWS Rename almost all occurences of LinuxBIOS to coreboot. 2008-01-18 15:08:58 +00:00
README Rename almost all occurences of LinuxBIOS to coreboot. 2008-01-18 15:08:58 +00:00

README 

-------------------------------------------------------------------------------
Coreboot README
-------------------------------------------------------------------------------

Coreboot is a Free Software project aimed at replacing the proprietary
BIOS you can find in most of today's computers.

It performs just a little bit of hardware initialization and then executes
one of many possible payloads, e.g. a Linux kernel.


Payloads
--------

After the basic initialization of the hardware has been performed, any
desired "payload" can be started by coreboot. Examples include:

 * A Linux kernel
 * FILO (a simple bootloader with filesystem support)
 * GRUB2 (a free bootloader; support is in development)
 * OpenBIOS (a free IEEE1275-1994 Open Firmware implementation)
 * Open Firmware (a free IEEE1275-1994 Open Firmware implementation)
 * SmartFirmware (a free IEEE1275-1994 Open Firmware implementation)
 * GNUFI (a free, UEFI-compatible firmware)
 * Etherboot (for network booting and booting from raw IDE or FILO)
 * ADLO (for booting Windows 2000 or OpenBSD)
 * Plan 9 (a distributed operating system)
 * memtest86 (for testing your RAM)


Supported Hardware
------------------

Coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

 * http://www.coreboot.org/Supported_Motherboards
 * http://www.coreboot.org/Supported_Chipsets_and_Devices


Website and Mailing List
------------------------

Further details on the project, a FAQ, many HOWTOs, news, development
guidelines and more can be found on the coreboot website:

  http://www.coreboot.org

You can contact us directly on the coreboot mailing list:

  http://www.coreboot.org/Mailinglist


Copyright and License
---------------------

The copyright on coreboot is owned by quite a large number of individual
developers and companies. Please check the individual source files for details.

Coreboot is licensed under the terms of the GNU General Public License (GPL).
Some files are licensed under the "GPL (version 2, or any later version)",
and some files (mostly those derived from the Linux kernel) are licensed under
the "GPL, version 2". For some parts, which were derived from other projects,
other (GPL-compatible) licenses may apply. Please check the individual
source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.