a69d682a0b
Some background first: The original XT keyboards used what we call
scancode set #1 today. The PC/AT keyboards introduced scancode set #2,
but for compatibility, its controller translated scancodes back to
set #1 by default. Newer keyboards (maybe all we have to deal with)
also support switching the scancode set.
This means the translation option in the controller and the scancode
set selection in the keyboard have to match. In libpayload, we only
support set #1 scancodes. So we either need the controller's trans-
lation on and set #2 selected in the keyboard, or the controller's
translation off and set #1 selected in the keyboard.
Valid configurations:
* SET #1 + XLATE off
* SET #2 + XLATE on
Both with and without the PC_KEYBOARD_AT_TRANSLATED option, we were
only configuring one of the two settings, leaving room for invalid
configurations. With this change, we try to select scancode set #2
first, which seems to be the most supported one, and configure the
controller's translation accordingly. We try to fall back to set #1
on failure.
We also keep translation disabled during configuration steps to
ensure that the controller doesn't accidentally translate confi-
guration data.
On the coreboot side, we leave the controller's translation at its
default setting, unless DRIVERS_PS2_KEYBOARD is enabled. The latter
enables the translation unconditionally. For QEMU this means that
the option effectively toggles the translation, as QEMU's controller
has it disabled by default. This probably made a lot of earlier
testing inconsistent.
Fixes: commit a95a6bf646 (libpayload/drivers/i8402/kbd: Fix qemu)
The reset introduced there effectively reverted the scancode
selection made before (because 2 is the default). It's unclear
if later changes to the code were only necessary to work
around it.
Change-Id: Iad85af516a7b9f9c0269ff9652ed15ee81700057
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46724
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
66 lines
2.7 KiB
C
66 lines
2.7 KiB
C
/*
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*
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* Copyright 2018 Google LLC
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef __DRIVERS_I8042_I8042_H__
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#define __DRIVERS_I8042_I8042_H__
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/* Port 0x64 commands */
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#define I8042_CMD_RD_CMD_BYTE 0x20
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#define I8042_CMD_WR_CMD_BYTE 0x60
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#define I8042_CMD_BYTE_XLATE (1 << 6)
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#define I8042_CMD_DIS_AUX 0xa7
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#define I8042_CMD_EN_AUX 0xa8
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#define I8042_CMD_AUX_TEST 0xa9
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#define I8042_CMD_SELF_TEST 0xaa
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#define I8042_SELF_TEST_RSP 0x55
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#define I8042_CMD_KB_TEST 0xab
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#define I8042_CMD_DIAG_DUMP 0xac
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#define I8042_CMD_DIS_KB 0xad
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#define I8042_CMD_EN_KB 0xae
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#define I8042_CMD_RD_INPUT_PORT 0xc0
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#define I8042_CMD_RD_OUTPUT_PORT 0xd0
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#define I8042_CMD_WR_OUTPUT_PORT 0xd1
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#define I8042_CMD_RD_TEST_INPUTS 0xe0
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/* Port 0x60 keyboard commands */
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#define I8042_KBCMD_SET_MODE_IND 0xed
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#define I8042_MODE_CAPS_LOCK_ON (1 << 2)
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#define I8042_MODE_CAPS_LOCK_OFF (0 << 2)
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#define I8042_MODE_NUM_LOCK_ON (1 << 1)
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#define I8042_MODE_NUM_LOCK_OFF (0 << 1)
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#define I8042_MODE_SCROLL_LOCK_ON (1 << 0)
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#define I8042_MODE_SCROLL_LOCK_OFF (0 << 0)
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#define I8042_KBCMD_SET_SCANCODE 0xf0
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#define I8042_KBCMD_SET_TYPEMATIC 0xf3
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#define I8042_KBCMD_EN 0xf4
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#define I8042_KBCMD_DEFAULT_DIS 0xf5
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#define I8042_KBCMD_SET_DEFAULT 0xf6
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#define I8042_KBCMD_RESEND 0xfe
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#define I8042_KBCMD_RESET 0xff
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#endif /* __DRIVERS_I8042_I8042_H__ */
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