a73b93157f
It encourages users from writing to the FSF without giving an address. Linux also prefers to drop that and their checkpatch.pl (that we imported) looks out for that. This is the result of util/scripts/no-fsf-addresses.sh with no further editing. Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/11888 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
46 lines
1.4 KiB
Text
46 lines
1.4 KiB
Text
/*
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* This file is part of the coreboot project.
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*
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* Copyright 2015 Google Inc
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <memlayout.h>
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#include <arch/header.ld>
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SECTIONS
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{
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/*
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* It would be good to lay down RAMSTAGE, ROMSTAGE, etc consecutively
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* like other architectures/chipsets it's not possible because of
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* the linking games played during romstage creation by trying
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* to find the final landing place in CBFS for XIP. Therefore,
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* conditionalize with macros.
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*/
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#if ENV_RAMSTAGE
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RAMSTAGE(CONFIG_RAMBASE, CONFIG_RAMTOP - CONFIG_RAMBASE)
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#elif ENV_ROMSTAGE
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/* The 1M size is not allocated. It's just for basic size checking.
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* Link at 32MiB address and rely on cbfstool to relocate to XIP. */
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ROMSTAGE(32M, 1M)
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/* Pull in the cache-as-ram rules. */
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#include "car.ld"
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#elif ENV_VERSTAGE
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/* The 1M size is not allocated. It's just for basic size checking.
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* Link at 32MiB address and rely on cbfstool to relocate to XIP. */
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VERSTAGE(32M, 1M)
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/* Pull in the cache-as-ram rules. */
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#include "car.ld"
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#endif
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}
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