a73b93157f
It encourages users from writing to the FSF without giving an address. Linux also prefers to drop that and their checkpatch.pl (that we imported) looks out for that. This is the result of util/scripts/no-fsf-addresses.sh with no further editing. Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/11888 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
87 lines
2.2 KiB
C
87 lines
2.2 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2009 Libra Li <libra.li@technexion.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifdef __PRE_RAM__
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#include <arch/cpu.h>
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#include "southbridge/amd/sb600/sb600.h"
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#else
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#include <arch/io.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include "southbridge/amd/sb600/sb600.h"
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#include <delay.h>
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#endif /* __PRE_RAM__ */
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#include "speaker.h"
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void speaker_init(uint8_t time) {
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/* SB600 RRG.
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* Options_0 - RW - 8 bits - [PM_Reg: 60h].
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* SpkrEn, bit[5]=1b, Setting this bit will configure GPIO2 to be speaker output.
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*/
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#ifdef __PRE_RAM__
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pmio_write(0x60, (pmio_read(0x60) | (1<<5)));
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#else
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pm_iowrite(0x60, (pm_ioread(0x60) | (1<<5)));
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#endif /* __PRE_RAM__ */
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/* SB600 RRG.
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* Tmr1CntrlWord - RW - 8 bits - [IO_Reg: 43h].
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* ModeSelect, bit[3:1]=011b, Square wave output.
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* CmmandSelect, bit[5:4]=11b, Read/write least, and then most significant byte.
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* CounterSelect, bit[7:6]=10b, Select counter 2.
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*/
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outb(0xb6, 0x43);
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/* SB600 RRG.
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* TimerCh2- RW - 8 bits - [IO_Reg: 42h].
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*/
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outb(time, 0x42);
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}
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void speaker_on_nodelay(void) {
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/* SB600 RRG.
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* Nmi_Status - RW - 8 bits - [IO_Reg: 61h].
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* SpkrEnable, bit[0]=1b, Enable counter 2
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* SpkrTmrEnable, bit[1]=1b, Speaker timer on
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*/
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outb(inb(0x61) | 0x03, 0x61);
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}
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void speaker_on_delay(void) {
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speaker_on_nodelay();
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mdelay(100);
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}
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void speaker_off_nodelay(void) {
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/* SB600 RRG.
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* Nmi_Status - RW - 8 bits - [IO_Reg: 61h].
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* SpkrEnable, bit[0]=0b, Disable counter 2
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* SpkrTmrEnable, bit[1]=0b, Speaker timer off
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*/
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outb(inb(0x61) & ~0x03, 0x61);
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}
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void speaker_off_delay(void) {
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speaker_off_nodelay();
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mdelay(100);
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}
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