Maxim Polyakov a76a64833b soc/intel/common/gpio_defs: Remove PAD_CFG_NF_BUF_TRIG ... This macro is not correct because the RX Level/Edge Configuration (trig) and the GPIO Tx/Rx Buffer Disable (bufdis) fields in DW0 register do not affect on the pad in the native function mode. This is part of the patch set "src/mb/*, src/soc/intel/common/gpio: Remove PAD_CFG_NF_BUF_TRIG ": CB:43455 - cedarisland: undo set trig and bufdis for NF pads CB:43454 - tiogapass: undo set trig and bufdis for NF pads CB:43561 - h110m: undo set trig and bufdis for NF pads CB:43569 - soc/intel/common/gpio_defs: Remove PAD_CFG_NF_BUF_TRIG Change-Id: Ic0416e3f67016c648f0886df73f585e8a08d4e92 Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43569 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lance Zhao Reviewed-by: Michael Niewöhner		2020-07-26 21:33:08 +00:00
..
amd	soc/amd/common: Refactor and consolidate code for spi base	2020-07-26 21:04:25 +00:00
cavium	src: Remove unused 'include <types.h>'	2020-07-14 16:10:17 +00:00
intel	soc/intel/common/gpio_defs: Remove PAD_CFG_NF_BUF_TRIG	2020-07-26 21:33:08 +00:00
mediatek	src: Remove unused 'include <stdint.h>	2020-07-14 16:11:10 +00:00
nvidia	src: Remove unused 'include <stdint.h>	2020-07-14 16:11:10 +00:00
qualcomm	src: Remove unused 'include <stdint.h>	2020-07-14 16:11:10 +00:00
rockchip	soc/rockchip/rk3399/display.c: Add missing include	2020-07-14 16:11:42 +00:00
samsung	soc/samsung/exynos5420: Drop dead code	2020-07-09 21:37:01 +00:00
sifive	treewide: Add Kconfig variable MEMLAYOUT_LD_FILE	2020-06-13 06:49:23 +00:00
ucb	soc/ucb/riscv: Add chip_operations stub	2020-05-28 09:30:35 +00:00