fd33781fbf
CONFIG_ARCH is a property of the cpu or soc rather than a property of the board. Hence, move ARCH_* from every single board to respective cpu or soc Kconfigs. Also update abuild to ignore ARCH_ from mainboards. Change-Id: I6ec1206de5a20601c32d001a384a47f46e6ce479 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: http://review.coreboot.org/5570 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
94 lines
1.3 KiB
Text
94 lines
1.3 KiB
Text
if BOARD_TYAN_S2912_FAM10
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config BOARD_SPECIFIC_OPTIONS # dummy
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def_bool y
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select CPU_AMD_SOCKET_F_1207
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select DIMM_DDR2
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select DIMM_REGISTERED
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select NORTHBRIDGE_AMD_AMDFAM10
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select SOUTHBRIDGE_NVIDIA_MCP55
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select MCP55_USE_NIC
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select SUPERIO_WINBOND_W83627HF
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select HAVE_OPTION_TABLE
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select HAVE_PIRQ_TABLE
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select HAVE_MP_TABLE
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select LIFT_BSP_APIC_ID
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select BOARD_ROMSIZE_KB_1024
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select ENABLE_APIC_EXT_ID
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select AMDMCT
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select MMCONF_SUPPORT_DEFAULT
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select QRANK_DIMM_SUPPORT
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config MAINBOARD_DIR
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string
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default tyan/s2912_fam10
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config DCACHE_RAM_BASE
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hex
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default 0xc4000
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config DCACHE_RAM_SIZE
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hex
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default 0x0c000
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config APIC_ID_OFFSET
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hex
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default 0
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config SB_HT_CHAIN_ON_BUS0
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int
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default 2
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config MAINBOARD_PART_NUMBER
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string
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default "S2912 (Fam10)"
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config PCI_64BIT_PREF_MEM
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bool
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default n
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config MAX_CPUS
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int
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default 12
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config MAX_PHYSICAL_CPUS
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int
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default 2
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config HT_CHAIN_UNITID_BASE
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hex
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default 0x1
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config HT_CHAIN_END_UNITID_BASE
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hex
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default 0x20
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config SERIAL_CPU_INIT
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bool
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default n
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config IRQ_SLOT_COUNT
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int
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default 11
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config AMD_UCODE_PATCH_FILE
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string
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default "mc_patch_01000095.h"
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config RAMBASE
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hex
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default 0x200000
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config RAMTOP
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hex
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default 0x1000000
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config HEAP_SIZE
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hex
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default 0xc0000
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config MCP55_PCI_E_X_0
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int
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default 1
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endif # BOARD_TYAN_S2912_FAM10
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