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Sumeet Pawnikar a91d931114 drivers/intel/dptf: Add new thermal control mechanism for pch device
Add new thermal control mechanism for pch device under dptf driver.
This provides support of different control knobs for FIVR.

BUG=b:198582766
BRANCH=None
TEST=Build FW and test on brya0 board

Change-Id: I035d2844b9ba6a9532ae006fc1c43e34cb94328a
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57096
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2021-09-05 19:27:54 +00:00
3rdparty 3rdparty/intel-microcode: Update submodule to 20210608 release 2021-08-13 18:06:50 +00:00
Documentation Documentation: add Intel Broadwell 2021-09-02 23:33:39 +00:00
LICENSES
configs configs/config.google_meep_cros: don't select ADD_FSP_BINARIES 2021-09-04 18:33:29 +00:00
payloads libpayload: Move EXTRA_CFLAGS to enable option override 2021-09-01 19:34:20 +00:00
src drivers/intel/dptf: Add new thermal control mechanism for pch device 2021-09-05 19:27:54 +00:00
tests tests: Add lib/cbfs-verification-test test case 2021-09-02 00:31:02 +00:00
util utils/abuild: select FSP_USE_REPO instead of ADD_FSP_BINARIES 2021-09-05 17:52:38 +00:00
.checkpatch.conf
.clang-format
.editorconfig
.gitignore
.gitmodules
.gitreview
AUTHORS
COPYING
MAINTAINERS util/liveiso: Add NixOS configs for bootable live systems 2021-09-03 19:38:15 +00:00
Makefile util/kconfig: Uprev to Linux 5.13's kconfig 2021-07-13 20:28:14 +00:00
Makefile.inc build system: Deduplicate symbols in objdump 2021-07-23 15:06:56 +00:00
README.md
gnat.adc
toolchain.inc toolchain.inc: copy architecture specific CFLAGS to GCC_ADAFLAGS 2021-07-01 09:43:54 +00:00

README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of "unusual" things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that's worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • doxygen (for generating/viewing documentation)
  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.