Ryan Chuang a9be096fa7 soc/mediatek/mt8195: Support 4 channel DRAM in DPM init flow ... Signed-off-by: Ryan Chuang <ryan.chuang@mediatek.corp-partner.google.com> Change-Id: If2e9d8a4dcfad28c48a2b5fa7c92f70fae879e67 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55749 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>		2021-06-24 03:13:53 +00:00
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amd	soc/amd/common/acp: Populate _WOV ACPI method	2021-06-23 19:19:19 +00:00
cavium
example
intel	soc/intel/common: Fix X2APIC NMI entry in ACPI MADT	2021-06-23 10:14:17 +00:00
mediatek	soc/mediatek/mt8195: Support 4 channel DRAM in DPM init flow	2021-06-24 03:13:53 +00:00
nvidia
qualcomm	sc7280: Add target specific GPIO pin definitions	2021-06-11 07:36:16 +00:00
rockchip
samsung
sifive
ti
ucb