Subrata Banik 4ed9f9a507 soc/intel: Use of common reset code block ... This patch removes all redundant reset code block from each SoC and make use of common reset code block(fsp_reset.c) based on SOC_INTEL_COMMON_FSP_RESET. Respective SoC Kconfig to choose correct FSP global reset type as per FSP integration guide. Signed-off-by: Subrata Banik <subrata.banik@intel.com> Change-Id: I71531f4cf7a40efa9ec55c48c2cb4fb6ea90531f Reviewed-on: https://review.coreboot.org/c/coreboot/+/45337 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>		2020-11-02 10:43:53 +00:00
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alderlake	soc/intel: Use of common reset code block	2020-11-02 10:43:53 +00:00
apollolake	soc/intel: Use of common reset code block	2020-11-02 10:43:53 +00:00
baytrail	src: Include <arch/io.h> when appropriate	2020-10-26 06:44:40 +00:00
braswell	src: Include <arch/io.h> when appropriate	2020-10-26 06:44:40 +00:00
broadwell	soc/intel/broadwell: Drop reg-script to finalize PCH	2020-10-30 00:47:07 +00:00
cannonlake	soc/intel: Use of common reset code block	2020-11-02 10:43:53 +00:00
common	soc/intel/common: Create common Intel FSP reset code block	2020-11-02 10:43:40 +00:00
denverton_ns	soc/intel/denverton_ns: Add PCH_DEVFN_PMC for finding PMC device	2020-11-02 06:28:50 +00:00
elkhartlake	soc/intel: Use of common reset code block	2020-11-02 10:43:53 +00:00
icelake	soc/intel: Use of common reset code block	2020-11-02 10:43:53 +00:00
jasperlake	soc/intel: Use of common reset code block	2020-11-02 10:43:53 +00:00
quark	arch/x86: Introduce ARCH_ALL_STAGES_X86_32	2020-09-26 11:42:28 +00:00
skylake	soc/intel: Use of common reset code block	2020-11-02 10:43:53 +00:00
tigerlake	soc/intel: Use of common reset code block	2020-11-02 10:43:53 +00:00
xeon_sp	soc/intel/xeon_sp/bootblock.c: Report the FSP-T output	2020-11-02 06:16:53 +00:00
Kconfig