aab8bb2bdf
Add definitions for the GPIO pins on Alder Lake LP, as well as GPIO IRQ routing information and supporting ACPI ASL. For now, add the following 5 GPIO communities and 13 GPIO groups: Comm. 0: GPP_B, GPP_T, GPP_A Comm. 1: GPP_S, GPP_H, GPP_D Comm. 2: GPD Comm. 4: GPP_C, GPP_F, GPP_E, GPP_HVMOS Comm. 5: GPP_R, GPP_SPI0 Change-Id: I77b9dcc46aceaf530e2054c9cacd7b026ebbb96b Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45571 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
171 lines
3.5 KiB
Text
171 lines
3.5 KiB
Text
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <intelblocks/gpio.h>
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#include <soc/gpio_defs.h>
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#include <soc/intel/common/acpi/gpio.asl>
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#include <soc/intel/common/block/acpi/acpi/gpio_op.asl>
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#include <soc/irq.h>
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#include <soc/pcr_ids.h>
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Device (GPIO)
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{
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Name (_HID, CROS_GPIO_NAME)
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Name (_UID, 0)
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Name (_DDN, "GPIO Controller")
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Name (RBUF, ResourceTemplate()
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{
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Memory32Fixed (ReadWrite, 0, 0, COM0)
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Memory32Fixed (ReadWrite, 0, 0, COM1)
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Memory32Fixed (ReadWrite, 0, 0, COM4)
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Memory32Fixed (ReadWrite, 0, 0, COM5)
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Interrupt (ResourceConsumer, Level, ActiveLow, Shared,,, GIRQ)
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{ GPIO_IRQ14 }
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})
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Method (_CRS, 0, NotSerialized)
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{
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/* GPIO Community 0 */
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CreateDWordField (^RBUF, ^COM0._BAS, BAS0)
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CreateDWordField (^RBUF, ^COM0._LEN, LEN0)
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BAS0 = ^^PCRB (PID_GPIOCOM0)
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LEN0 = GPIO_BASE_SIZE
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/* GPIO Community 1 */
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CreateDWordField (^RBUF, ^COM1._BAS, BAS1)
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CreateDWordField (^RBUF, ^COM1._LEN, LEN1)
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BAS1 = ^^PCRB (PID_GPIOCOM1)
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LEN1 = GPIO_BASE_SIZE
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/* GPIO Community 4 */
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CreateDWordField (^RBUF, ^COM4._BAS, BAS4)
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CreateDWordField (^RBUF, ^COM4._LEN, LEN4)
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BAS4 = ^^PCRB (PID_GPIOCOM4)
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LEN4 = GPIO_BASE_SIZE
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/* GPIO Community 5 */
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CreateDWordField (^RBUF, ^COM5._BAS, BAS5)
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CreateDWordField (^RBUF, ^COM5._LEN, LEN5)
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BAS5 = ^^PCRB (PID_GPIOCOM5)
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LEN5 = GPIO_BASE_SIZE
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Return (RBUF)
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}
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Method (_STA, 0, NotSerialized)
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{
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Return (0xF)
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}
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}
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/*
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* Get GPIO DW0 Address
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* Arg0 - GPIO Number
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*/
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Method (GADD, 1, NotSerialized)
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{
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/* GPIO Community 0 */
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If (Arg0 >= GPIO_COM0_START && Arg0 <= GPIO_COM0_END)
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{
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Local0 = PID_GPIOCOM0
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Local1 = Arg0 - GPIO_COM0_START
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}
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/* GPIO Community 1 */
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If (Arg0 >= GPIO_COM1_START && Arg0 <= GPIO_COM1_END)
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{
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Local0 = PID_GPIOCOM1
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Local1 = Arg0 - GPIO_COM1_START
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}
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/* GPIO Community 2 */
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If (Arg0 >= GPIO_COM2_START && Arg0 <= GPIO_COM2_END)
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{
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Local0 = PID_GPIOCOM2
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Local1 = Arg0 - GPIO_COM2_START
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}
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/* GPIO Community 4 */
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If (Arg0 >= GPIO_COM4_START && Arg0 <= GPIO_COM4_END)
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{
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Local0 = PID_GPIOCOM4
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Local1 = Arg0 - GPIO_COM4_START
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}
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/* GPIO Community 5*/
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If (Arg0 >= GPIO_COM5_START && Arg0 <= GPIO_COM5_END)
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{
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Local0 = PID_GPIOCOM5
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Local1 = Arg0 - GPIO_COM5_START
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}
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Local2 = PCRB(Local0) + PAD_CFG_BASE + (Local1 * 16)
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Return (Local2)
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}
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/*
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* Return PCR Port ID of GPIO Communities
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*
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* Arg0: GPIO Community (0-5)
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*/
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Method (GPID, 1, Serialized)
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{
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Switch (ToInteger (Arg0))
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{
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Case (COMM_0) {
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Local0 = PID_GPIOCOM0
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}
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Case (COMM_1) {
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Local0 = PID_GPIOCOM1
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}
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Case (COMM_2) {
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Local0 = PID_GPIOCOM2
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}
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Case (COMM_4) {
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Local0 = PID_GPIOCOM4
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}
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Case (COMM_5) {
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Local0 = PID_GPIOCOM5
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}
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Default {
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Return (0)
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}
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}
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Return (Local0)
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}
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/* GPIO Power Management bits */
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Name(GPMB, Package(TOTAL_GPIO_COMM) {0, 0, 0, 0, 0})
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/*
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* Save GPIO Power Management bits
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*/
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Method (SGPM, 0, Serialized)
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{
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For (Local0 = 0, Local0 < TOTAL_GPIO_COMM, Local0++)
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{
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Local1 = GPID (Local0)
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GPMB[Local0] = PCRR (Local1, GPIO_MISCCFG)
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}
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}
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/*
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* Restore GPIO Power Management bits
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*/
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Method (RGPM, 0, Serialized)
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{
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For (Local0 = 0, Local0 < TOTAL_GPIO_COMM, Local0++)
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{
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CGPM (Local0, DerefOf(GPMB[Local0]))
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}
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}
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/*
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* Save current setting of GPIO Power Management bits and
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* enable all Power Management bits for all communities
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*/
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Method (EGPM, 0, Serialized)
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{
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/* Save current setting and will restore it when resuming */
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SGPM ()
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/* Enable PM bits */
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For (Local0 = 0, Local0 < TOTAL_GPIO_COMM, Local0++)
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{
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CGPM (Local0, MISCCFG_ENABLE_GPIO_PM_CONFIG)
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}
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}
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