coreboot-kgpe-d16/src/southbridge
Kyösti Mälkki ab368d96d7 sb/intel/lynxpoint: Remove GPE0_{EN,STS}_2 defines
By ACPI specification, those follow GPE0_EN bits in the register space.
Use sizeof() to replace the 2/4 offset previously used.

Change-Id: I27ada0b19b2cf5e8eca71f48bf103dcab1b3cc11
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74979
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2023-05-14 12:42:45 +00:00
..
amd sb,soc/amd,intel: Sync FADT entries visually 2023-05-10 21:26:55 +00:00
intel sb/intel/lynxpoint: Remove GPE0_{EN,STS}_2 defines 2023-05-14 12:42:45 +00:00
ricoh/rl5c476
ti