70460249fd
Several ramstage files were inadvertently using Family 10h-specfic structures, causing unstable operation. Use the K8-specific structures instead. Change-Id: I64066dfdca83557393499b77726051e25b814381 Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: http://review.coreboot.org/12290 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
153 lines
3.8 KiB
C
153 lines
3.8 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering
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* Copyright (C) 2007 AMD
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* (Written by Yinghai Lu <yinghailu@amd.com> for AMD)
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* Copyright (C) 2007 Philipp Degler <pdegler@rumms.uni-mannheim.de>
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* (Thanks to LSRA University of Mannheim for their support)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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// WARNING
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// These tables are INCOMPLETE for this mainboard!
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// The ACPI tables are correct; a backport to these MP tables is needed...
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#include <console/console.h>
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#include <arch/smp/mpspec.h>
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#include <device/pci.h>
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#include <string.h>
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#include <stdint.h>
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#include <cpu/amd/amdk8_sysconf.h>
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extern unsigned char bus_ck804[6];
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extern unsigned apicid_ck804;
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static void *smp_write_config_table(void *v)
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{
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struct mp_config_table *mc;
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unsigned sbdn;
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int bus_isa;
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mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
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mptable_init(mc, LOCAL_APIC_ADDR);
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smp_write_processors(mc);
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get_bus_conf();
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sbdn = sysconf.sbdn;
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mptable_write_buses(mc, NULL, &bus_isa);
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/* I/O APICs: APIC ID Version State Address */
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{
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device_t dev;
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struct resource *res;
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dev = dev_find_slot(bus_ck804[0], PCI_DEVFN(sbdn + 0x1, 0));
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if (dev) {
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res = find_resource(dev, PCI_BASE_ADDRESS_1);
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if (res) {
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smp_write_ioapic(mc, apicid_ck804, 0x11,
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res2mmio(res, 0, 0));
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}
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/* Initialize interrupt mapping. */
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/*
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LPC bridge PCI config registers:
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0x7c:0x0000ffff
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- bitmap of masked pci irqs?
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- PIRQ[ABCD] possibly?
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0x7c:0x00f00000
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- sata at f8 - port 1
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0x7c:0x0f000000
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- sata at f7 - port 1
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0x80:0xf0000000
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- sata at f7 - port 0
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0x80:0x0f000000
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- sata at f8 - port 0
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0x80:0x0000f000
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- EHCI
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0x84:0x00000f00
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- NIC
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0x84:0x0000000f
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- OHCI
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known values of nibbles:
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0 - unrouted?
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1 - irq 23
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8 - irq 20
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c - irq 12
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d - irq 21
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e - irq 14
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f - irq 15
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*/
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// Enable interrupts for commonly used devices (USB, SATA, etc.)
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pci_write_config32(dev, 0x7c, 0x0d800018);
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pci_write_config32(dev, 0x80, 0xd8002009);
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pci_write_config32(dev, 0x84, 0x00000001);
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}
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}
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mptable_add_isa_interrupts(mc, bus_isa, apicid_ck804, 0);
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// Onboard ck804 smbus
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,
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bus_ck804[0], ((sbdn + 1) << 2) | 1, apicid_ck804,
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0xa);
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// Onboard ck804 USB 1.1
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,
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bus_ck804[0], ((sbdn + 2) << 2) | 0, apicid_ck804,
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0x15);
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// Onboard ck804 USB 2
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,
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bus_ck804[0], ((sbdn + 2) << 2) | 1, apicid_ck804,
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0x14);
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// Onboard ck804 SATA 0
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,
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bus_ck804[0], ((sbdn + 7) << 2) | 0, apicid_ck804,
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0x17);
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// Onboard ck804 SATA 1
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,
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bus_ck804[0], ((sbdn + 8) << 2) | 0, apicid_ck804,
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0x16);
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/* Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
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mptable_lintsrc(mc, bus_ck804[0]);
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/* There is no extension information... */
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/* Compute the checksums. */
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return mptable_finalize(mc);
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}
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unsigned long write_smp_table(unsigned long addr)
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{
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void *v = smp_write_floating_table(addr, 0);
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return (unsigned long)smp_write_config_table(v);
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}
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