coreboot-kgpe-d16/src
Paul Menzel ac22227370 Intel Lynx Point: Use 2 << 24 to clarify that I/O APIC ID is 2
Commit »haswell: Add initial support for Haswell platforms« (76c3700f)
[1] used `1 << 25` to set the I/O APIC ID of 2. Instead using
`2 << 24`, which is the same value, makes it clear, that the
I/O APIC ID is 2.

Commit »Intel Panther Point PCH: Use 2 << 24 to clarify that APIC ID
is 2« (8c937c7e) [2] is used as a template.

[1] http://review.coreboot.org/2616
[2] http://review.coreboot.org/3100

Change-Id: I28f9e90856157b4fdd9a1e781472cc4f51d25ece
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/3123
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
2013-05-03 06:26:28 +02:00
..
arch armv7: invalidate TLB entries as they are added/modified 2013-05-01 23:57:16 +02:00
console spkmodem console 2013-04-18 22:47:59 +02:00
cpu mainboard/{asus/f2a85-m,amd/thatcher}: move UDELAY_LAPIC 2013-05-03 06:23:41 +02:00
device device tree: track init times 2013-05-01 21:36:16 +02:00
drivers [2/2] tps65090: re-factor for coreboot 2013-04-10 17:34:19 +02:00
ec ChromeEC: Drop unneeded Kconfig variable EC_GOOGLE_API_ROOT 2013-04-18 02:47:23 +02:00
include coreboot: add timer queue implementation 2013-05-01 07:19:12 +02:00
lib cbfs: make searching for a file less verbose 2013-05-03 06:25:03 +02:00
mainboard mainboard/{asus/f2a85-m,amd/thatcher}: move UDELAY_LAPIC 2013-05-03 06:23:41 +02:00
northbridge boot: remove cbmem_post_handling() 2013-05-01 07:11:22 +02:00
southbridge Intel Lynx Point: Use 2 << 24 to clarify that I/O APIC ID is 2 2013-05-03 06:26:28 +02:00
superio Add new superio device 2013-04-12 00:37:34 +02:00
vendorcode Eliminate use of pointers in coreboot table 2013-04-20 05:18:15 +02:00
Kconfig Kconfig: Capitalize CBMEM in description of `EARLY_CBMEM_INIT` 2013-05-03 06:26:19 +02:00