86b0c8b480
This patch adds plumbing necessary to ensure that the CBMEM WiFi calibration blobs entry, if present, is referenced if the coreboot table. BRANCH=storm BUG=chrome-os-partner:32611 TEST=none - the entry is not yet in the CBMEM Change-Id: I072f2368b628440b6fe84f310eebc1ab945f809e Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: d0330280369753a6520196425e6dfc7d7bd226a3 Original-Change-Id: I04d52934ad1c5466d0d124b32df5ab17c0f59686 Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/225270 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9232 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
215 lines
7.9 KiB
C
215 lines
7.9 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2009 coresystems GmbH
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* Copyright (C) 2013 Google, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA
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*/
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#ifndef _CBMEM_H_
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#define _CBMEM_H_
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#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) && \
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! IS_ENABLED(CONFIG_RELOCATABLE_RAMSTAGE)
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#define HIGH_MEMORY_SAVE (CONFIG_RAMTOP - CONFIG_RAMBASE)
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#else
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#define HIGH_MEMORY_SAVE 0
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#endif
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#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) && \
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defined(CONFIG_HIGH_SCRATCH_MEMORY_SIZE)
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#define HIGH_MEMORY_SCRATCH CONFIG_HIGH_SCRATCH_MEMORY_SIZE
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#else
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#define HIGH_MEMORY_SCRATCH 0
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#endif
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/* Delegation of resume backup memory so we don't have to
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* (slowly) handle backing up OS memory in romstage.c
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*/
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#define CBMEM_BOOT_MODE 0x610
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#define CBMEM_RESUME_BACKUP 0x614
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#define CBMEM_FSP_HOB_PTR 0x614
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#define CBMEM_ID_FREESPACE 0x46524545
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#define CBMEM_ID_GDT 0x4c474454
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#define CBMEM_ID_ACPI 0x41435049
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#define CBMEM_ID_ACPI_GNVS 0x474e5653
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#define CBMEM_ID_ACPI_GNVS_PTR 0x474e5650
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#define CBMEM_ID_IGD_OPREGION 0x4f444749
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#define CBMEM_ID_CBTABLE 0x43425442
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#define CBMEM_ID_PIRQ 0x49525154
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#define CBMEM_ID_MPTABLE 0x534d5054
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#define CBMEM_ID_RESUME 0x5245534d
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#define CBMEM_ID_RESUME_SCRATCH 0x52455343
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#define CBMEM_ID_SMBIOS 0x534d4254
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#define CBMEM_ID_TIMESTAMP 0x54494d45
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#define CBMEM_ID_MRCDATA 0x4d524344
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#define CBMEM_ID_CONSOLE 0x434f4e53
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#define CBMEM_ID_ELOG 0x454c4f47
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#define CBMEM_ID_COVERAGE 0x47434f56
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#define CBMEM_ID_ROMSTAGE_INFO 0x47545352
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#define CBMEM_ID_ROMSTAGE_RAM_STACK 0x90357ac4
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#define CBMEM_ID_RAMSTAGE 0x9a357a9e
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#define CBMEM_ID_RAMSTAGE_CACHE 0x9a3ca54e
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#define CBMEM_ID_ROOT 0xff4007ff
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#define CBMEM_ID_VBOOT_HANDOFF 0x780074f0
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#define CBMEM_ID_CAR_GLOBALS 0xcac4e6a3
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#define CBMEM_ID_EHCI_DEBUG 0xe4c1deb9
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#define CBMEM_ID_REFCODE 0x04efc0de
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#define CBMEM_ID_REFCODE_CACHE 0x4efc0de5
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#define CBMEM_ID_POWER_STATE 0x50535454
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#define CBMEM_ID_SMM_SAVE_SPACE 0x07e9acee
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#define CBMEM_ID_RAM_OOPS 0x05430095
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#define CBMEM_ID_MEMINFO 0x494D454D
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#define CBMEM_ID_WIFI_CALIBRATION 0x57494649
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#define CBMEM_ID_AMDMCT_MEMINFO 0x494D454E
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#define CBMEM_ID_SPINTABLE 0x59175917
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#define CBMEM_ID_NONE 0x00000000
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#define CBMEM_ID_AGESA_RUNTIME 0x41474553
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#define CBMEM_ID_HOB_POINTER 0x484f4221
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#ifndef __ASSEMBLER__
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#include <stddef.h>
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#include <stdint.h>
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struct cbmem_id_to_name {
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u32 id;
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const char *name;
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};
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#define CBMEM_ID_TO_NAME_TABLE \
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{ CBMEM_ID_FREESPACE, "FREE SPACE " }, \
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{ CBMEM_ID_GDT, "GDT " }, \
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{ CBMEM_ID_ACPI, "ACPI " }, \
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{ CBMEM_ID_CBTABLE, "COREBOOT " }, \
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{ CBMEM_ID_PIRQ, "IRQ TABLE " }, \
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{ CBMEM_ID_MPTABLE, "SMP TABLE " }, \
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{ CBMEM_ID_RESUME, "ACPI RESUME" }, \
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{ CBMEM_ID_RESUME_SCRATCH, "ACPISCRATCH" }, \
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{ CBMEM_ID_ACPI_GNVS, "ACPI GNVS " }, \
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{ CBMEM_ID_ACPI_GNVS_PTR, "GNVS PTR " }, \
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{ CBMEM_ID_SMBIOS, "SMBIOS " }, \
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{ CBMEM_ID_TIMESTAMP, "TIME STAMP " }, \
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{ CBMEM_ID_MRCDATA, "MRC DATA " }, \
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{ CBMEM_ID_CONSOLE, "CONSOLE " }, \
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{ CBMEM_ID_ELOG, "ELOG " }, \
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{ CBMEM_ID_COVERAGE, "COVERAGE " }, \
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{ CBMEM_ID_ROMSTAGE_INFO, "ROMSTAGE " }, \
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{ CBMEM_ID_ROMSTAGE_RAM_STACK, "ROMSTG STCK" }, \
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{ CBMEM_ID_RAMSTAGE, "RAMSTAGE " }, \
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{ CBMEM_ID_RAMSTAGE_CACHE, "RAMSTAGE $ " }, \
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{ CBMEM_ID_ROOT, "CBMEM ROOT " }, \
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{ CBMEM_ID_VBOOT_HANDOFF, "VBOOT " }, \
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{ CBMEM_ID_CAR_GLOBALS, "CAR GLOBALS" }, \
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{ CBMEM_ID_AGESA_RUNTIME, "AGESA RSVD " }, \
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{ CBMEM_ID_EHCI_DEBUG, "USBDEBUG " }, \
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{ CBMEM_ID_REFCODE, "REFCODE " }, \
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{ CBMEM_ID_SMM_SAVE_SPACE, "SMM BACKUP " }, \
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{ CBMEM_ID_REFCODE_CACHE, "REFCODE $ " }, \
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{ CBMEM_ID_POWER_STATE, "POWER STATE" }, \
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{ CBMEM_ID_RAM_OOPS, "RAMOOPS " }, \
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{ CBMEM_ID_MEMINFO, "MEM INFO " }, \
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{ CBMEM_ID_AMDMCT_MEMINFO, "AMDMEM INFO" }, \
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{ CBMEM_ID_WIFI_CALIBRATION, "WIFI CLBR " }, \
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{ CBMEM_ID_SPINTABLE, "SPIN TABLE " },
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struct cbmem_entry;
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/*
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* The dynamic cbmem infrastructure allows for growing cbmem dynamically as
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* things are added. It requires an external function, cbmem_top(), to be
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* implemented by the board or chipset to define the upper address where
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* cbmem lives. This address is required to be a 32-bit address. Additionally,
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* the address needs to be consistent in both romstage and ramstage. The
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* dynamic cbmem infrastructure allocates new regions below the last allocated
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* region. Regions are defined by a cbmem_entry struct that is opaque. Regions
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* may be removed, but the last one added is the only that can be removed.
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*
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* Dynamic cbmem has two allocators within it. All allocators use a top down
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* allocation scheme. However, there are 2 modes for each allocation depending
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* on the requested size. There are large allocations and small allocations.
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* An allocation is considered to be small when it is less than or equal to
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* DYN_CBMEM_ALIGN_SIZE / 2. The smaller allocations are fit into a larger
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* allocation region.
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*/
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#define DYN_CBMEM_ALIGN_SIZE (4096)
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/* By default cbmem is attempted to be recovered. Returns 0 if cbmem was
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* recovered or 1 if cbmem had to be reinitialized. */
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int cbmem_initialize(void);
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/* Initialize cbmem to be empty. */
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void cbmem_initialize_empty(void);
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/* Return the top address for dynamic cbmem. The address returned needs to
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* be consistent across romstage and ramstage, and it is required to be
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* below 4GiB. */
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void *cbmem_top(void);
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/* Set the top address for dynamic cbmem. Not for new designs. */
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void cbmem_set_top(void *ramtop);
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/* Add a cbmem entry of a given size and id. These return NULL on failure. The
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* add function performs a find first and do not check against the original
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* size. */
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const struct cbmem_entry *cbmem_entry_add(u32 id, u64 size);
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/* Find a cbmem entry of a given id. These return NULL on failure. */
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const struct cbmem_entry *cbmem_entry_find(u32 id);
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/* Remove a region defined by a cbmem_entry. Returns 0 on success, < 0 on
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* error. Note: A cbmem_entry cannot be removed unless it was the last one
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* added. */
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int cbmem_entry_remove(const struct cbmem_entry *entry);
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/* cbmem_entry accessors to get pointer and size of a cbmem_entry. */
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void *cbmem_entry_start(const struct cbmem_entry *entry);
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u64 cbmem_entry_size(const struct cbmem_entry *entry);
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/* Returns 0 if old cbmem was recovered. Recovery is only attempted if
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* s3resume is non-zero. */
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int cbmem_recovery(int s3resume);
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/* Add a cbmem entry of a given size and id. These return NULL on failure. The
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* add function performs a find first and do not check against the original
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* size. */
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void *cbmem_add(u32 id, u64 size);
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/* Find a cbmem entry of a given id. These return NULL on failure. */
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void *cbmem_find(u32 id);
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void cbmem_run_init_hooks(void);
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void cbmem_fail_resume(void);
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#ifndef __PRE_RAM__
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/* Ramstage only functions. */
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/* Add the cbmem memory used to the memory map at boot. */
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void cbmem_add_bootmem(void);
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void cbmem_list(void);
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void cbmem_print_entry(int n, u32 id, u64 start, u64 size);
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#endif /* __PRE_RAM__ */
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/* These are for compatibility with old boards only. Any new chipset and board
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* must implement cbmem_top() for both romstage and ramstage to support
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* early features like COLLECT_TIMESTAMPS and CBMEM_CONSOLE.
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*/
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#if IS_ENABLED(CONFIG_ARCH_X86) && IS_ENABLED(CONFIG_LATE_CBMEM_INIT)
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unsigned long get_top_of_ram(void);
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void set_top_of_ram(uint64_t ramtop);
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void backup_top_of_ram(uint64_t ramtop);
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#endif
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#endif /* __ASSEMBLER__ */
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#endif /* _CBMEM_H_ */
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