coreboot-kgpe-d16/src
Tobias Diedrich ae3adffb7d amd/agesa/hudson: Add support for hiding the USB1.1-only OHCI
The hudson chipset has 4 USB controllers, the fourth is USB1.1-only and
(presumably) not used very often, add support for hiding it:
00:10.0 USB controller: Advanced Micro Devices, Inc. [AMD] FCH USB XHCI Controller (rev 03) USB1 (3.0, XHCI)
00:10.1 USB controller: Advanced Micro Devices, Inc. [AMD] FCH USB XHCI Controller (rev 03)
00:12.0 USB controller: Advanced Micro Devices, Inc. [AMD] FCH USB OHCI Controller (rev 11) USB2 (2.0, OHCI+EHCI)
00:12.2 USB controller: Advanced Micro Devices, Inc. [AMD] FCH USB EHCI Controller (rev 11)
00:13.0 USB controller: Advanced Micro Devices, Inc. [AMD] FCH USB OHCI Controller (rev 11) USB3 (2.0, OHCI+EHCI)
00:13.2 USB controller: Advanced Micro Devices, Inc. [AMD] FCH USB EHCI Controller (rev 11)
00:14.5 USB controller: Advanced Micro Devices, Inc. [AMD] FCH USB OHCI Controller (rev 11) USB4 (1.1, OHCI only)

Change-Id: I804e7852fd0a6f870dd118b429473cb06ebac9a4
Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Reviewed-on: http://review.coreboot.org/7355
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-10-24 00:22:42 +02:00
..
acpi acpi/sata: add generic sata ssdt port generator 2015-06-07 01:24:47 +02:00
arch armv7: Word-sized/half-word-sized memory operations for 32/16 bit read/write 2015-10-17 18:10:29 +00:00
commonlib vboot: prepare for x86 verstage 2015-10-11 23:57:29 +00:00
console x86: add standalone verstage support 2015-10-14 17:07:52 +00:00
cpu cpu/intel: Move Power notification ASL code into `common/acpi` 2015-10-23 22:28:12 +02:00
device device/hypertransport: Add additional debug output 2015-10-23 20:00:07 +02:00
drivers gma ACPI: Make brightness levels a per board setting 2015-10-22 23:01:36 +02:00
ec ec/google: Move label to BOL to satisfy lint-tests 2015-10-15 07:36:26 +00:00
include include/smbios: Update SMBIOS memory structures to version 2.8 2015-10-23 19:58:17 +02:00
lib Revert "coreboot_table: don't add CMOS checksum twice." 2015-10-20 16:35:12 +02:00
mainboard amd/acpi: Clean up SMBus references. 2015-10-24 00:17:50 +02:00
northbridge Intel: Move MCRS ResourceTemplate outside of _CRS method 2015-10-23 22:32:11 +02:00
soc Intel: Move MCRS ResourceTemplate outside of _CRS method 2015-10-23 22:32:11 +02:00
southbridge amd/agesa/hudson: Add support for hiding the USB1.1-only OHCI 2015-10-24 00:22:42 +02:00
superio superio/nuvoton/nct5572d: Enable power state after power failure support 2015-10-23 20:04:07 +02:00
vendorcode amd/sb800: Make UsbRxMode per-board customizable 2015-10-24 00:21:01 +02:00
Kconfig Enable MULTIPLE_CBFS_INSTANCES on x86, too 2015-10-20 16:39:00 +02:00