coreboot-kgpe-d16/spd/lp5/set-1
John Su 06a4cb437c spd/lp5: Add 2 Micron memory parts
Add Micron memory part MT62F1G32D2DS-023 and MT62F2G32D4DS-023 to LP5
global list. Attributes are derived from CCM005-1974498342-145. Also,
regenerate the SPD files for the SoC.

BUG=b:271188237
TEST=util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5

Change-Id: I6675a68b7a515bd6d21db3ea2da762b06dee017a
Signed-off-by: John Su <john_su@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73489
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
2023-03-10 13:46:26 +00:00
..
parts_spd_manifest.generated.txt spd/lp5: Add 2 Micron memory parts 2023-03-10 13:46:26 +00:00
spd-1.hex util/spd_tools/spd_gen/lp5: Remove maxSpeed for Sabrina 2022-08-01 20:30:39 +00:00
spd-2.hex util/spd_tools/spd_gen/lp5: Remove maxSpeed for Sabrina 2022-08-01 20:30:39 +00:00
spd-3.hex util/spd_tools/spd_gen/lp5: Remove maxSpeed for Sabrina 2022-08-01 20:30:39 +00:00
spd-4.hex util/spd_tools/spd_gen/lp5: Remove maxSpeed for Sabrina 2022-08-01 20:30:39 +00:00
spd-5.hex util/spd_tools/spd_gen/lp5: Remove maxSpeed for Sabrina 2022-08-01 20:30:39 +00:00
spd-6.hex util/spd_tools/spd_gen/lp5: Remove maxSpeed for Sabrina 2022-08-01 20:30:39 +00:00
spd-7.hex spd/lp5: Re-generate the SPD data 2022-10-28 12:06:29 +00:00
spd-8.hex spd/lp5: Re-generate the SPD data 2022-10-28 12:06:29 +00:00
spd-9.hex spd/lp5: Add SPD for Samsung K3KL6L60GM-MGCT 2023-03-02 11:43:31 +00:00
spd-10.hex spd/lp5: Modify Hynix LPDDR5X memory Speed 2023-03-04 04:35:50 +00:00
spd-11.hex spd/lp5: Modify Hynix LPDDR5X memory Speed 2023-03-04 04:35:50 +00:00
spd-empty.hex spd/lp5: Generate initial SPDs for Sabrina SoC 2022-02-10 12:50:19 +00:00