6d6d18efe8
Dinar mainboard is an AMD evaluation board for Orochi Platform family15 model 00-0f processor. The mainbaord has dual G34 Socket, SR5690/SR5670/SR5650 and SP5100 chipsets. 16 cores InterLagos Opteron processor are supported. Windows 7 are verified on this platform. Change-Id: Id97d35e7bca9f0d422841e23f4b762f1ed101ea0 Signed-off-by: Kerry Sheh <kerry.she@amd.com> Signed-off-by: Kerry Sheh <shekairui@gmail.com> Reviewed-on: http://review.coreboot.org/564 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
136 lines
5.1 KiB
C
136 lines
5.1 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2012 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/*----------------------------------------------------------------------------------------
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* M O D U L E S U S E D
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*----------------------------------------------------------------------------------------
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*/
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#ifndef _AGESAWRAPPER_H_
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#define _AGESAWRAPPER_H_
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#include <stdint.h>
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#include "Porting.h"
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#include "AGESA.h"
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/*----------------------------------------------------------------------------------------
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* D E F I N I T I O N S A N D M A C R O S
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*----------------------------------------------------------------------------------------
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*/
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/* Define AMD Ontario APPU SSID/SVID */
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#define AMD_APU_SVID 0x1022
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#define AMD_APU_SSID 0x1234
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#define PCIE_BASE_ADDRESS CONFIG_MMCONF_BASE_ADDRESS
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#define MMIO_NP_BIT BIT7
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/* Hudson-2 ACPI PmIO Space Define */
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#define SB_ACPI_BASE_ADDRESS 0x0400
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#define ACPI_MMIO_BASE 0xFED80000
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#define SB_CFG_BASE 0x000 // DWORD
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#define GPIO_BASE 0x100 // BYTE
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#define SMI_BASE 0x200 // DWORD
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#define PMIO_BASE 0x300 // DWORD
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#define PMIO2_BASE 0x400 // BYTE
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#define BIOS_RAM_BASE 0x500 // BYTE
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#define CMOS_RAM_BASE 0x600 // BYTE
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#define CMOS_BASE 0x700 // BYTE
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#define ASF_BASE 0x900 // DWORD
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#define SMBUS_BASE 0xA00 // DWORD
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#define WATCHDOG_BASE 0xB00 // ??
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#define HPET_BASE 0xC00 // DWORD
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#define IOMUX_BASE 0xD00 // BYTE
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#define MISC_BASE 0xE00
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#define SERIAL_DEBUG_BASE 0x1000
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#define GFX_DAC_BASE 0x1400
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#define CEC_BASE 0x1800
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#define XHCI_BASE 0x1C00
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#define ACPI_SMI_DATA_PORT 0xB1
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#define R_SB_ACPI_PM1_STATUS 0x00
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#define R_SB_ACPI_PM1_ENABLE 0x02
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#define R_SB_ACPI_PM_CONTROL 0x04
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#define R_SB_ACPI_EVENT_STATUS 0x20
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#define R_SB_ACPI_EVENT_ENABLE 0x24
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#define B_PWR_BTN_STATUS BIT8
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#define B_WAKEUP_STATUS BIT15
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#define B_SCI_EN BIT0
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#define SB_PM_INDEX_PORT 0xCD6
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#define SB_PM_DATA_PORT 0xCD7
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#define SB_PMIOA_REG24 0x24 // AcpiMmioEn
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#define MmioAddress( BaseAddr, Register ) \
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( (UINTN)BaseAddr + \
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(UINTN)(Register) \
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)
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#define Mmio32Ptr( BaseAddr, Register ) \
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( (volatile UINT32 *)MmioAddress( BaseAddr, Register ) )
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#define Mmio32( BaseAddr, Register ) \
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*Mmio32Ptr( BaseAddr, Register )
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enum {
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PICK_DMI, /* DMI Interface */
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PICK_PSTATE, /* Acpi Pstate SSDT Table */
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PICK_SRAT, /* SRAT Table */
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PICK_SLIT, /* SLIT Table */
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PICK_WHEA_MCE, /* WHEA MCE table */
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PICK_WHEA_CMC, /* WHEA CMV table */
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PICK_ALIB, /* SACPI SSDT table with ALIB implementation */
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};
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/*----------------------------------------------------------------------------------------
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* T Y P E D E F S A N D S T R U C T U R E S
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*----------------------------------------------------------------------------------------
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*/
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typedef struct {
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UINT32 CalloutName;
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AGESA_STATUS (*CalloutPtr) (UINT32 Func, UINT32 Data, VOID* ConfigPtr);
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} BIOS_CALLOUT_STRUCT;
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/*----------------------------------------------------------------------------------------
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* P R O T O T Y P E S O F L O C A L F U N C T I O N S
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*----------------------------------------------------------------------------------------
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*/
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/*----------------------------------------------------------------------------------------
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* E X P O R T E D F U N C T I O N S
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*----------------------------------------------------------------------------------------
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*/
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/*---------------------------------------------------------------------------------------
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* L O C A L F U N C T I O N S
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*---------------------------------------------------------------------------------------
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*/
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//void brazos_platform_stage(void);
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UINT32 agesawrapper_amdinitreset (void);
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UINT32 agesawrapper_amdinitearly (void);
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UINT32 agesawrapper_amdinitenv (void);
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UINT32 agesawrapper_amdinitlate (void);
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UINT32 agesawrapper_amdinitpost (void);
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UINT32 agesawrapper_amdinitmid (void);
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void sb_After_Pci_Init (void);
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void sb_Mid_Post_Init (void);
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void sb_Late_Post (void);
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UINT32 agesawrapper_amdreadeventlog (void);
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UINT32 agesawrapper_amdinitmmio (void);
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void *agesawrapper_getlateinitptr (int pick);
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#endif
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