56fcfb5b4f
Currently this XHCI driver assumes the PCH XHCI controller, but the TCSS or North XHCI block has a similar enough PCI MMIO structure to make this code mostly reusable. 1) Rename everything to drop the `pch_` prefix 2) xhci_update_wake_event() now takes in a pci_devfn_t for the XHCI controller 3) soc_get_xhci_usb_info() also now takes a pci_devfn_t for the XHCI controller BUG=b:172279037 TEST=plug in USB keyboard while in S0, enter S0ix and verify entry via EC; type on keyboard, verify it wakes up, eventlog contains: 39 | 2020-12-10 09:40:21 | S0ix Enter 40 | 2020-12-10 09:40:42 | S0ix Exit 41 | 2020-12-10 09:40:42 | Wake Source | PME - XHCI (USB 2.0 port) | 1 42 | 2020-12-10 09:40:42 | Wake Source | GPE # | 109 which verifies it still functions for the PCH XHCI controller Change-Id: I9f28354e031e3eda587f4faf8ef7595dce8b33ea Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47411 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
21 lines
576 B
C
21 lines
576 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <device/pci_type.h>
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#include <intelblocks/xhci.h>
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#define XHCI_USB2_PORT_STATUS_REG 0x480
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#define XHCI_USB3_PORT_STATUS_REG 0x580
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#define XHCI_USB2_PORT_NUM 14
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#define XHCI_USB3_PORT_NUM 10
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static const struct xhci_usb_info usb_info = {
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.usb2_port_status_reg = XHCI_USB2_PORT_STATUS_REG,
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.num_usb2_ports = XHCI_USB2_PORT_NUM,
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.usb3_port_status_reg = XHCI_USB3_PORT_STATUS_REG,
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.num_usb3_ports = XHCI_USB3_PORT_NUM,
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};
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const struct xhci_usb_info *soc_get_xhci_usb_info(pci_devfn_t xhci_dev)
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{
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return &usb_info;
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}
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