a76a64833b
This macro is not correct because the RX Level/Edge Configuration (trig) and the GPIO Tx/Rx Buffer Disable (bufdis) fields in DW0 register do not affect on the pad in the native function mode. This is part of the patch set "src/mb/*, src/soc/intel/common/gpio: Remove PAD_CFG_NF_BUF_TRIG ": CB:43455 - cedarisland: undo set trig and bufdis for NF pads CB:43454 - tiogapass: undo set trig and bufdis for NF pads CB:43561 - h110m: undo set trig and bufdis for NF pads CB:43569 - soc/intel/common/gpio_defs: Remove PAD_CFG_NF_BUF_TRIG Change-Id: Ic0416e3f67016c648f0886df73f585e8a08d4e92 Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43569 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lance Zhao Reviewed-by: Michael Niewöhner |
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| .. | ||
| architecture.md | ||
| build_system.md | ||
| comparision_coreboot_uefi.dia | ||
| comparision_coreboot_uefi.svg | ||
| gerrit_guidelines.md | ||
| gpio.md | ||
| index.md | ||
| kconfig.md | ||
| license.md | ||
| submodules.md | ||
| writing_documentation.md | ||
