coreboot-kgpe-d16/src/mainboard/google/chell
Julius Werner 320edbe2ba vboot: Assume EC_SOFTWARE_SYNC and VIRTUAL_DEV_SWITCH by default
The virtualized developer switch was invented five years ago and has
been used on every vboot system ever since. We shouldn't need to specify
it again and again for every new board. This patch flips the Kconfig
logic around and replaces CONFIG_VIRTUAL_DEV_SWITCH with
CONFIG_PHYSICAL_DEV_SWITCH, so that only a few ancient boards need to
set it and it fits better with CONFIG_PHYSICAL_REC_SWITCH. (Also set the
latter for Lumpy which seems to have been omitted incorrectly, and hide
it from menuconfig since it's a hardware parameter that shouldn't be
configurable.)

Since almost all our developer switches are virtual, it doesn't make
sense for every board to pass a non-existent or non-functional developer
mode switch in the coreboot tables, so let's get rid of that. It's also
dangerously confusing for many boards to define a get_developer_mode()
function that reads an actual pin (often from a debug header) which will
not be honored by coreboot because CONFIG_PHYSICAL_DEV_SWITCH isn't set.
Therefore, this patch removes all those non-functional instances of that
function. In the future, either the board has a physical dev switch and
must define it, or it doesn't and must not.

In a similar sense (and since I'm touching so many board configs
anyway), it's annoying that we have to keep selecting EC_SOFTWARE_SYNC.
Instead, it should just be assumed by default whenever a Chrome EC is
present in the system. This way, it can also still be overridden by
menuconfig.

CQ-DEPEND=CL:459701

Change-Id: If9cbaa7df530580a97f00ef238e3d9a8a86a4a7f
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/18980
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-03-28 22:15:46 +02:00
..
acpi ec: Use EC_ENABLE_LID_SWITCH for all mainboards with LID using chromeec 2017-03-27 03:03:16 +02:00
spd src/mainboard: Capitalize ROM, RAM, CPU and APIC 2016-08-14 19:06:25 +02:00
acpi_tables.c mainboard & southbridge: Clear files that are just headers 2016-12-05 19:20:49 +01:00
board_info.txt google/intel mainboards: Add missing board_info.txt files 2016-03-25 20:52:04 +01:00
boardid.c tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
bootblock_mainboard.c vboot: consolidate google_chromeec_early_init() calls 2016-08-25 22:50:17 +02:00
chromeos.c vboot: Assume EC_SOFTWARE_SYNC and VIRTUAL_DEV_SWITCH by default 2017-03-28 22:15:46 +02:00
chromeos.fmd chromeos.fmd: Mark RW_LEGACY as CBFS 2016-04-05 13:37:31 +02:00
cmos.layout mainboard: Clean up boot_option/reboot_bits in cmos.layout 2016-08-17 00:27:42 +02:00
devicetree.cb acpi: Add ACPI_ prefix to IRQ enum and struct names 2017-02-22 22:19:19 +01:00
dsdt.asl chromeos mainboards: remove chromeos.asl 2016-07-30 01:36:32 +02:00
ec.c tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
ec.h mainboards,ec: provide common declaration for mainboard_ec_init() 2016-09-26 23:53:12 +02:00
gpio.h skylake: gpio: Add support for setting 1.8V tolerant 2016-06-09 17:07:26 +02:00
Kconfig mainboard/{google,intel}: Change config option selection 2017-02-20 05:08:27 +01:00
Kconfig.name
mainboard.c chromeos mainboards: remove chromeos.asl 2016-07-30 01:36:32 +02:00
Makefile.inc skylake/mainboard: Define mainboard hook in bootblock 2016-07-28 05:17:03 +02:00
pei_data.c google/chell: Modify DqsMap 2016-01-19 16:39:02 +01:00
ramstage.c tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
romstage.c mainboards: align on using ACPI_Sx definitions 2016-07-15 08:30:31 +02:00
smihandler.c mainboards/skylake: use common Chrome EC SMI helpers 2016-07-15 08:36:24 +02:00