Ronak Kanabar 369405090f vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2117_00 ... The headers added are generated as per FSP v2117_00. Previous FSP version was v2081_02. Changes Include: - Adjust Reserved UPD Offset in FspmUpd.h and FspsUpd.h - Remove FivrFaults and FivrEfficiency Upds from FspmUpd.h - Few UPDs description update in FspmUpd.h and FspsUpd.h BUG=b:184129128 BRANCH=None TEST=Build and boot ADLRVP Change-Id: I068552084b1ef3e5c4fba7a46240d116c92c7b5b Cq-Depend: TBD Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51977 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>		2021-04-16 14:37:03 +00:00
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edk2	treewide: Remove trailing whitespace	2021-02-17 17:30:05 +00:00
fsp	vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2117_00	2021-04-16 14:37:03 +00:00
Kconfig
Makefile.inc	vendorcode/intel/Makefile: Add x86_64 support	2021-02-04 10:21:49 +00:00