4a2fc3e6f0
Change-Id: Ieaed5cf76c6f0a6a121e6add731d5c1e1528dfc7 Signed-off-by: Zheng Bao <zheng.bao@amd.com> Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/11375 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
138 lines
4.1 KiB
C
138 lines
4.1 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2015 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc.
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*/
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#include <northbridge/amd/pi/agesawrapper.h>
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#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
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static const PCIe_PORT_DESCRIPTOR PortList [] = {
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/* Initialize Port descriptor (PCIe port, Lanes 8-15, PCI Device Number 3, ...) */
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{
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0,
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PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 8, 15),
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PCIE_PORT_DATA_INITIALIZER_V2 (PortEnabled, ChannelTypeExt6db, 3, 1,
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HotplugDisabled,
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PcieGenMaxSupported,
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PcieGenMaxSupported,
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AspmDisabled, 0x02, 0)
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},
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/* Initialize Port descriptor (PCIe port, Lanes 2, PCI Device Number 2, ...) */
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{
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0,
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PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 7, 7),
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PCIE_PORT_DATA_INITIALIZER_V2 (PortEnabled, ChannelTypeExt6db, 2, 5,
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HotplugDisabled,
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PcieGenMaxSupported,
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PcieGenMaxSupported,
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AspmDisabled, 0x03, 0)
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},
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/* Initialize Port descriptor (PCIe port, Lanes 3, PCI Device Number 2, ...) */
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{
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0,
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PCIE_ENGINE_DATA_INITIALIZER (PcieUnusedEngine, 6, 6),
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PCIE_PORT_DATA_INITIALIZER_V2 (PortDisabled, ChannelTypeExt6db, 2, 4,
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HotplugDisabled,
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PcieGenMaxSupported,
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PcieGenMaxSupported,
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AspmDisabled, 0x04, 0)
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},
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/* Initialize Port descriptor (PCIe port, Lanes 4-7, PCI Device Number 2, ...) */
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{
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0,
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PCIE_ENGINE_DATA_INITIALIZER (PcieUnusedEngine, 5, 5),
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PCIE_PORT_DATA_INITIALIZER_V2 (PortEnabled, ChannelTypeExt6db, 2, 3,
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HotplugDisabled,
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PcieGenMaxSupported,
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PcieGenMaxSupported,
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AspmDisabled, 0x05, 0)
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},
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/* Initialize Port descriptor (PCIe port, Lanes 4-5, PCI Device Number 2, ...) */
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{
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0,
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PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 4, 5),
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PCIE_PORT_DATA_INITIALIZER_V2 (PortEnabled, ChannelTypeExt6db, 2, 2,
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HotplugDisabled,
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PcieGenMaxSupported,
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PcieGenMaxSupported,
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AspmDisabled, 0x06, 0)
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},
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/* Initialize Port descriptor (PCIe port, Lanes 0-3, PCI Device Number 2, ...) */
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{
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DESCRIPTOR_TERMINATE_LIST, // Descriptor flags !!!IMPORTANT!!! Terminate last element of array
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PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 0, 3),
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PCIE_PORT_DATA_INITIALIZER_V2 (PortEnabled, ChannelTypeExt6db, 2, 1,
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HotplugDisabled,
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PcieGenMaxSupported,
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PcieGenMaxSupported,
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AspmDisabled, 0x07, 0)
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},
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};
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static const PCIe_DDI_DESCRIPTOR DdiList [] = {
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/* DP0 */
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{
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0,
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PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 16, 19),
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PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDP, Aux1, Hdp1)
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},
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/* DP1 */
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{
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0, //DESCRIPTOR_TERMINATE_LIST,
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PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 20, 23),
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PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDP, Aux2, Hdp2)
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},
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/* DP2 */
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{
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DESCRIPTOR_TERMINATE_LIST,
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PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 24, 27),
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PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDP, Aux3, Hdp3)
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},
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};
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static const PCIe_COMPLEX_DESCRIPTOR PcieComplex = {
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.Flags = DESCRIPTOR_TERMINATE_LIST,
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.SocketId = 0,
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.PciePortList = PortList,
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.DdiLinkList = DdiList
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};
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/*---------------------------------------------------------------------------------------*/
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/**
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* OemCustomizeInitEarly
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*
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* Description:
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* This is the stub function will call the host environment through the binary block
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* interface (call-out port) to provide a user hook opportunity
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*
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* Parameters:
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* @param[in] **PeiServices
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* @param[in] *InitEarly
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*
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* @retval VOID
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*
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**/
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/*---------------------------------------------------------------------------------------*/
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VOID OemCustomizeInitEarly (
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IN OUT AMD_EARLY_PARAMS *InitEarly
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)
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{
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InitEarly->GnbConfig.PcieComplexList = &PcieComplex;
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}
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