b13bd1efcf
This reverts commit 77cc3267fc.
Reason for revert: Breaks quark and also needs breaking down into multiple CLs as commented by Nico on CB:45541
Change-Id: Idf4ca74158df15483856754ee24cc4472a8e09b0
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44997
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
46 lines
1 KiB
C
46 lines
1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <cf9_reset.h>
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#include <console/console.h>
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#include <fsp/util.h>
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#include <intelblocks/pmclib.h>
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#include <soc/intel/common/reset.h>
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#include <soc/me.h>
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#include <soc/pm.h>
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static void do_force_global_reset(void)
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{
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/*
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* BIOS should ensure it does a global reset
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* to reset both host and Intel ME by setting
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* PCH PMC [B0:D31:F2 register offset 0xAC bit 20]
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*/
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pmc_global_reset_enable(true);
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/* Now BIOS can write 0x06 or 0x0E to 0xCF9 port
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* to global reset platform */
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do_full_reset();
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}
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void do_global_reset(void)
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{
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if (!send_global_reset()) {
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/* If ME unable to reset platform then
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* force global reset using PMC CF9GR register*/
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do_force_global_reset();
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}
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}
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void chipset_handle_reset(uint32_t status)
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{
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switch (status) {
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case FSP_STATUS_RESET_REQUIRED_3: /* Global Reset */
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printk(BIOS_DEBUG, "GLOBAL RESET!!\n");
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global_reset();
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break;
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default:
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printk(BIOS_ERR, "unhandled reset type %x\n", status);
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die("unknown reset type");
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break;
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}
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}
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