3d38448619
1. Due to reset signal, PMIC loses its internal register state. This causes PMIC to be in improper state after sleep. 2. The intent of reset signal is to reset internal state of PMIC (which happens once during power on), hence avoid asserting reset signal when not needed. 3. As per PMIC (TPS68470) datasheet, device can be kept in SLEEP mode when not in use to save max possible power. To fix the same, do not reset PMIC while entering sleep. By keeping PMIC in SLEEP mode, Power consumption is < 1uW (Typ) upto 3.63uW (Max). Refs: TPS68470 datasheet. Measured value: 0.66uW TEST= Build the firmware for Soraka & boot to OS. Do S3 resume & check whether PMIC internal registers state are preserved. Change-Id: I93ce4d76b0376b64ae6d1067aca0fd7467af3582 Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com> Reviewed-on: https://review.coreboot.org/20264 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Furquan Shaikh <furquan@google.com>
48 lines
1.2 KiB
C
48 lines
1.2 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2016 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <cpu/x86/smm.h>
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#include <ec/google/chromeec/smm.h>
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#include <gpio.h>
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#include <soc/gpio.h>
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#include <soc/smm.h>
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#include <variant/gpio.h>
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#include <variant/ec.h>
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void mainboard_smi_espi_handler(void)
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{
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chromeec_smi_process_events();
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}
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static void mainboard_gpio_smi_sleep(void)
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{
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/* Power down camera PMIC */
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gpio_set(EN_PP3300_DX_CAM, 0);
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}
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void mainboard_smi_sleep(u8 slp_typ)
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{
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chromeec_smi_sleep(slp_typ, MAINBOARD_EC_S3_WAKE_EVENTS,
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MAINBOARD_EC_S5_WAKE_EVENTS);
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mainboard_gpio_smi_sleep();
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}
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int mainboard_smi_apmc(u8 apmc)
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{
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chromeec_smi_apmc(apmc, MAINBOARD_EC_SCI_EVENTS,
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MAINBOARD_EC_SMI_EVENTS);
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return 0;
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}
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