480 lines
13 KiB
C
480 lines
13 KiB
C
/*
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* This file is part of the LinuxBIOS project.
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*
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* Copyright (C) 2006 Ronald Minnich <rminnich@gmail.com>
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* Copyright (C) 2006 coresystems GmbH <info@coresystems.de>
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* Copyright (C) 2007 Carl-Daniel Hailfinger
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <sys/io.h>
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/* well, they really thought this through, eh? Family is 8 bits!!!! */
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char *familyid[] = {
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[0xf1] = "pc8374 (winbond, was NS)"
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};
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/* eventually, if you care, break this out into a file. For now, I don't know
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* if we need this.
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*/
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unsigned char regval(unsigned short port, unsigned char reg) {
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outb(reg, port);
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return inb(port + 1);
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}
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void regwrite(unsigned short port, unsigned char reg, unsigned char val) {
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outb(reg, port);
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outb(val, port + 1);
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}
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void
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dump_ns8374(unsigned short port) {
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printf("Enables: 21=%02x, 22=%02x, 23=%02x, 24=%02x, 26=%02x\n",
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regval(port, 0x21), regval(port, 0x22), regval(port, 0x23),
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regval(port, 0x24), regval(port, 0x26));
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printf("SMBUS at %02x\n", regval(port, 0x2a));
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/* check COM1. This is all we care about at present. */
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printf("COM 1 is Globally %s\n", regval(port, 0x26) & 8 ? "disabled" : "enabled");
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/* select com1 */
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regwrite(port, 0x07, 0x03);
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printf("COM 1 is locally %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled");
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printf("COM1 60=%02x, 61=%02x, 70=%02x, 71=%02x, 74=%02x, 75=%02x, f0=%02x\n",
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regval(port, 0x60), regval(port, 0x61), regval(port, 0x70), regval(port, 0x71),
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regval(port, 0x74), regval(port, 0x75), regval(port, 0xf0));
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/* select gpio */
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regwrite(port, 0x07, 0x07);
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printf("GPIO is %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled");
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printf("GPIO 60=%02x, 61=%02x, 70=%02x, 71=%02x, 74=%02x, 75=%02x, f0=%02x\n",
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regval(port, 0x60), regval(port, 0x61), regval(port, 0x70), regval(port, 0x71),
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regval(port, 0x74), regval(port, 0x75), regval(port, 0xf0));
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}
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void
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dump_fintek(unsigned short port, unsigned int did)
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{
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switch(did) {
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case 0x0604:
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printf ("Fintek F71805\n");
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break;
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case 0x4103:
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printf ("Fintek F71872\n");
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break;
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default:
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printf ("Unknown Fintek SuperI/O: did=0x%04x\n", did);
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return;
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}
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printf("Flash write is %s.\n", regval(port, 0x28) & 0x80 ? "enabled" : "disabled");
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printf("Flash control is 0x%04x.\n", regval(port, 0x28));
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printf("27=%02x\n", regval(port, 0x27));
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printf("29=%02x\n", regval(port, 0x29));
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printf("2a=%02x\n", regval(port, 0x2a));
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printf("2b=%02x\n", regval(port, 0x2b));
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/* select UART 1 */
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regwrite(port, 0x07, 0x01);
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printf("UART1 is %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled");
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printf("UART1 base=%02x%02x, irq=%02x, mode=%s\n",
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regval(port, 0x60), regval(port, 0x61), regval(port, 0x70) & 0x0f,
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regval(port, 0xf0) & 0x10 ? "RS485":"RS232");
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/* select UART 2 */
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regwrite(port, 0x07, 0x02);
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printf("UART2 is %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled");
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printf("UART2 base=%02x%02x, irq=%02x, mode=%s\n",
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regval(port, 0x60), regval(port, 0x61), regval(port, 0x70) & 0x0f,
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regval(port, 0xf0) & 0x10 ? "RS485":"RS232");
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/* select Parport */
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regwrite(port, 0x07, 0x03);
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printf("PARPORT is %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled");
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printf("PARPORT base=%02x%02x, irq=%02x\n",
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regval(port, 0x60), regval(port, 0x61), regval(port, 0x70) & 0x0f);
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/* select hw monitor */
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regwrite(port, 0x07, 0x04);
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printf("HW monitor is %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled");
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printf("HW monitor base=%02x%02x, irq=%02x\n",
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regval(port, 0x60), regval(port, 0x61), regval(port, 0x70) & 0x0f);
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/* select gpio */
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regwrite(port, 0x07, 0x05);
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printf("GPIO is %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled");
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printf("GPIO 70=%02x, e0=%02x, e1=%02x, e2=%02x, e3=%02x, e4=%02x, e5=%02x\n",
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regval(port, 0x70), regval(port, 0xe0), regval(port, 0xe1), regval(port, 0xe2),
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regval(port, 0xe3), regval(port, 0xe4), regval(port, 0xe5));
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printf("GPIO e6=%02x, e7=%02x, e8=%02x, e9=%02x, f0=%02x, f1=%02x, f3=%02x, f4=%02x\n",
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regval(port, 0xe6), regval(port, 0xe7), regval(port, 0xe8), regval(port, 0xe9),
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regval(port, 0xf0), regval(port, 0xf1), regval(port, 0xf3), regval(port, 0xf4));
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printf("GPIO f5=%02x, f6=%02x, f7=%02x, f8=%02x\n",
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regval(port, 0xf5), regval(port, 0xf6), regval(port, 0xf7), regval(port, 0xf8));
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}
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/* End Of Table */
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#define EOT -1
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/* NO LDN needed */
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#define NOLDN -2
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/* Not Available */
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#define NANA -3
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/* Maximum Name Length */
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#define MAXNAMELEN 20
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/* Biggest LDN */
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#define MAXLDN 0xa
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/* biggestLDN + 0 + NOLDN + EOT */
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#define LDNSIZE MAXLDN + 3
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/* MAXimum NUMber of Indexes */
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#define MAXNUMIDX 70
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#define IDXSIZE MAXNUMIDX + 1
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const static struct ite_registers {
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/* yes, superio_id should be unsigned, but EOT has to be negative */
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signed short superio_id;
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char name[MAXNAMELEN];
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struct ite_ldnidx {
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signed short ldn;
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signed short idx[IDXSIZE];
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signed short def[IDXSIZE];
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} ldn[LDNSIZE];
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} ite_reg_table[] = {
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{0x8702, "IT8702", {
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{EOT}}},
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{0x8705, "IT8705 or IT8700", {
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{EOT}}},
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{0x8710, "IT8710", {
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{EOT}}},
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{0x8712, "IT8712", {
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{NOLDN,
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{0x07,0x20,0x21,0x22,0x23,0x24,0x2b,EOT},
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{NANA,0x87,0x12,0x08,0x00,0x00,0x00,EOT}},
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{0x0,
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{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,EOT},
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{0x00,0x03,0xf0,0x06,0x02,0x00,0x00,EOT}},
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{0x1,
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{0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,EOT},
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{0x00,0x03,0xf8,0x04,0x00,0x50,0x00,0x7f,EOT}},
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{0x2,
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{0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,EOT},
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{0x00,0x02,0xf8,0x03,0x00,0x50,0x00,0x7f,EOT}},
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{0x3,
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{0x30,0x60,0x61,0x62,0x63,0x70,0x74,0xf0,EOT},
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{0x00,0x03,0x78,0x07,0x78,0x07,0x03,0x03,EOT}},
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{0x4,
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{0x30,0x60,0x61,0x62,0x63,0x70,0xf0,0xf1,0xf2,0xf3,
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0xf4,0xf5,0xf6,EOT},
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{0x00,0x02,0x90,0x02,0x30,0x09,0x00,0x00,0x00,0x00,
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0x00,NANA,NANA,EOT}},
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{0x5,
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{0x30,0x60,0x61,0x62,0x63,0x70,0x71,0xf0,EOT},
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{0x01,0x00,0x60,0x00,0x64,0x01,0x02,0x00,EOT}},
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{0x6,
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{0x30,0x70,0x71,0xf0,EOT},
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{0x00,0x0c,0x02,0x00,EOT}},
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{0x7,
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{0x25,0x26,0x27,0x28,0x29,0x2a,0x2c,0x60,0x61,0x62,
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0x63,0x64,0x65,0x70,0x71,0x72,0x73,0x74,0xb0,0xb1,
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0xb2,0xb3,0xb4,0xb5,0xb8,0xb9,0xba,0xbb,0xbc,0xbd,
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0xc0,0xc1,0xc2,0xc3,0xc4,0xc8,0xc9,0xca,0xcb,0xcc,
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0xe0,0xe1,0xe2,0xe3,0xe4,0xf0,0xf1,0xf2,0xf3,0xf4,
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0xf5,0xf6,0xf7,0xf8,0xf9,0xfa,0xfb,0xfc,0xfd,EOT},
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{0x01,0x00,0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
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0x00,0x00,0x00,0x00,0x00,0x30,0x38,0x00,0x00,0x00,
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0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
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0x01,0x00,0x00,0x40,0x00,0x01,0x00,0x00,0x40,0x00,
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0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
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0x00,0x00,0x00,0x00,0x00,0x00,0x00,NANA,0x00,EOT}},
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{0x8,
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{0x30,0x60,0x61,0x70,0xf0,EOT},
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{0x00,0x03,0x00,0x0a,0x00,EOT}},
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{0x9,
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{0x30,0x60,0x61,EOT},
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{0x00,0x02,0x01,EOT}},
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{0xa,
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{0x30,0x60,0x61,0x70,0xf0,EOT},
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{0x00,0x03,0x10,0x0b,0x00,EOT}},
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{EOT}}},
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{0x8716, "IT8716", {
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{EOT}}},
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{0x8718, "IT8718", {
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{EOT}}},
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{EOT}
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};
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void
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dump_ite(unsigned short port, unsigned short id)
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{
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int i, j, k;
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signed short *idx;
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printf ("ITE ");
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/* ID Mapping Table
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unknown -> IT8711 (no datasheet)
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unknown -> IT8722 (no datasheet)
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0x8702 -> IT8702
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0x8705 -> IT8700 or IT8705
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0x8708 -> IT8708
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0x8710 -> IT8710
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0x8712 -> IT8712
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0x8716 -> IT8716
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0x8718 -> IT8718
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0x8726 -> IT8726 (datasheet wrongly says 0x8716)
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*/
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switch(id) {
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case 0x8702:
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case 0x8705:
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case 0x8710:
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case 0x8712:
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case 0x8716:
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case 0x8718:
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for (i=0;; i++) {
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if (ite_reg_table[i].superio_id == EOT)
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break;
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if ((unsigned short)ite_reg_table[i].superio_id != id)
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continue;
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printf ("%s\n", ite_reg_table[i].name);
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for (j=0;; j++) {
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if (ite_reg_table[i].ldn[j].ldn == EOT)
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break;
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if (ite_reg_table[i].ldn[j].ldn != NOLDN) {
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printf("switching to LDN 0x%01x\n",
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ite_reg_table[i].ldn[j].ldn);
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regwrite(port, 0x07,
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ite_reg_table[i].ldn[j].ldn);
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}
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idx = ite_reg_table[i].ldn[j].idx;
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printf("idx ");
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for (k=0;; k++) {
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if (idx[k] == EOT)
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break;
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printf("%02x ", idx[k]);
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}
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printf("\nval ");
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for (k=0;; k++) {
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if (idx[k] == EOT)
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break;
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printf("%02x ", regval(port, idx[k]));
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}
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printf("\ndef ");
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idx = ite_reg_table[i].ldn[j].def;
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for (k=0;; k++) {
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if (idx[k] == EOT)
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break;
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if (idx[k] == NANA)
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printf("NA ");
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else
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printf("%02x ", idx[k]);
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}
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printf("\n");
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}
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}
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break;
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default:
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printf ("unknown ITE chip, id=%04x\n", id);
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for (i=0x20; i<=0x24; i++)
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printf("index %02x=%02x\n", i, regval(port, i));
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break;
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}
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}
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void
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probe_idregs_simple(unsigned short port){
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unsigned char id;
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outb(0x20, port);
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if (inb(port) != 0x20) {
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if (inb(port) == 0xff )
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printf ("No SuperI/O chip found at 0x%04x\n", port);
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else
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printf("probing 0x%04x, failed (0x%02x), data returns 0x%02x\n",
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port, inb(port), inb(port + 1));
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return;
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}
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id = inb(port + 1);
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printf("SuperI/O found at 0x%02x: id = 0x%02x\n", port, id);
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if (id == 0xff)
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return;
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if (familyid[id])
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printf("%s\n", familyid[id]);
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else
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printf("<unknown>\n");
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switch(id) {
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case 0xf1:
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dump_ns8374(port);
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break;
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default:
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printf("no dump for 0x%02x\n", id);
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break;
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}
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}
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void
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probe_idregs_fintek(unsigned short port){
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unsigned int vid, did, success = 0;
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/* Enable configuration sequence (Fintek uses this for example)
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Older ITE chips have the same enable sequence */
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outb(0x87, port);
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outb(0x87, port);
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outb(0x20, port);
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if (inb(port) != 0x20) {
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if (inb(port) == 0xff )
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printf ("No SuperIO chip found at 0x%04x\n", port);
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else
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printf("probing 0x%04x, failed (0x%02x), data returns 0x%02x\n",
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port, inb(port), inb(port + 1));
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return;
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}
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did = inb(port + 1);
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did |= (regval(port, 0x21)<<8);
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vid = regval(port, 0x23);
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vid |= (regval(port, 0x24)<<8);
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printf("SuperIO found at 0x%02x: vid=0x%04x/did=0x%04x\n", port, vid, did);
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if (vid == 0xff || vid == 0xffff)
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return;
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/* printf("%s\n", familyid[id]); */
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switch(did) {
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case 0x0887: /* pseudoreversed for ITE8708 */
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case 0x1087: /* pseudoreversed for ITE8710 */
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success = 1;
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dump_ite(port, ((did & 0xff) << 8) | ((did & 0xff00) >> 8));
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/* disable configuration */
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regwrite(port, 0x02, 0x02);
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break;
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default:
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break;
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}
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switch(vid) {
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case 0x3419:
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success = 1;
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dump_fintek(port, did);
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break;
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default:
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break;
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}
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if (!success)
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printf("no dump for vid 0x%04x, did 0x%04x\n", vid, did);
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/* disable configuration (for Fintek, doesn't hurt ITE) */
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outb(0xaa, port);
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}
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void
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probe_idregs_ite(unsigned short port){
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unsigned int id, chipver;
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/* Enable configuration sequence (ITE uses this for newer IT87[012]x)
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IT871[01] uses 0x87, 0x87 -> fintek detection should handle it
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IT8761 uses 0x87, 0x61, 0x55, 0x55/0xaa
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IT86xx series uses different ports
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IT8661 uses 0x86, 0x61, 0x55/0xaa, 0x55/0xaa and 32 more writes
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IT8673 uses 0x86, 0x80, 0x55/0xaa, 0x55/0xaa and 32 more writes */
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outb(0x87, port);
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outb(0x01, port);
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outb(0x55, port);
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if (port == 0x2e)
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outb(0x55, port);
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else
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outb(0xAA, port);
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/* Read Chip ID Byte 1 */
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id = regval(port, 0x20);
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if (id != 0x87) {
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if (inb(port) == 0xff )
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printf ("No SuperIO chip found at 0x%04x\n", port);
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else
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printf("probing 0x%04x, failed (0x%02x), data returns 0x%02x\n",
|
|
port, inb(port), inb(port + 1));
|
|
return;
|
|
}
|
|
|
|
id <<= 8;
|
|
|
|
/* Read Chip ID Byte 2 */
|
|
id |= regval(port, 0x21);
|
|
|
|
/* Read Chip Version, only bit 3..0 for all IT87xx */
|
|
chipver = regval(port, 0x22) & 0x0f;
|
|
|
|
/* ID Mapping Table
|
|
unknown -> IT8711 (no datasheet)
|
|
unknown -> IT8722 (no datasheet)
|
|
0x8702 -> IT8702
|
|
0x8705 -> IT8700 or IT8705
|
|
0x8710 -> IT8710
|
|
0x8712 -> IT8712
|
|
0x8716 -> IT8716
|
|
0x8718 -> IT8718
|
|
0x8726 -> IT8726 (datasheet wrongly says 0x8716)
|
|
*/
|
|
printf("SuperI/O found at 0x%02x: id=0x%04x, chipver=0x%01x\n",
|
|
port, id, chipver);
|
|
|
|
switch(id) {
|
|
case 0x8702:
|
|
case 0x8705:
|
|
case 0x8712:
|
|
case 0x8716:
|
|
case 0x8718:
|
|
case 0x8726:
|
|
dump_ite(port, id);
|
|
break;
|
|
default:
|
|
printf("no dump for id 0x%04x\n", id);
|
|
break;
|
|
}
|
|
/* disable configuration */
|
|
regwrite(port, 0x02, 0x02);
|
|
}
|
|
|
|
void
|
|
probe_superio(unsigned short port) {
|
|
probe_idregs_simple(port);
|
|
probe_idregs_fintek(port);
|
|
probe_idregs_ite(port);
|
|
}
|
|
|
|
int
|
|
main(int argc, char *argv[])
|
|
{
|
|
if (iopl(3) < 0) {
|
|
perror("iopl");
|
|
exit(1);
|
|
}
|
|
|
|
/* try the 2e */
|
|
probe_superio(0x2e);
|
|
/* now try the 4e */
|
|
probe_superio(0x4e);
|
|
|
|
return 0;
|
|
}
|