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b203c2f95e
CBFS uses sprintf, which requires vtxprintf, which requires (in the current design) a nested function. That works on x86, but on PPC this requires a trampoline. In the ROM stage, this is not available, so remove the single use of sprintf and replace it with a direct string handler - it's only used to fill in fixed-length hex values. 20090819-3-more-noreturns-in-romcc: Mark two more functions in romcc as noreturn. Helps clang's scan-build a bit 20090819-4-cbfsify-ppc: Make PPC use CBFS. Support big endian ELF in cbfs-mkstage. Untested and not complete yet. 20090819-5-fix-ppc-build: The CBFS build system requires ROM_IMAGE_SIZE to have a somewhat plausible value. With fixes to tohex* functions as discussed on the list, and correct function names. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4558 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 |
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------------------------------------------------------------------------------- coreboot README ------------------------------------------------------------------------------- coreboot is a Free Software project aimed at replacing the proprietary BIOS you can find in most of today's computers. It performs just a little bit of hardware initialization and then executes one of many possible payloads, e.g. a Linux kernel or a bootloader. Payloads -------- After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot. See http://www.coreboot.org/Payloads for a list of supported payloads. Supported Hardware ------------------ coreboot supports a wide range of chipsets, devices, and mainboards. For details please consult: * http://www.coreboot.org/Supported_Motherboards * http://www.coreboot.org/Supported_Chipsets_and_Devices Build Requirements ------------------ * gcc / g++ * make * python * perl Optional: * doxygen (for generating/viewing documentation) * iasl (for targets with ACPI support) * gdb (for better debugging facilities on some targets) Building coreboot ----------------- Please consult http://www.coreboot.org/Documentation for details. Testing coreboot Without Modifying Your Hardware ------------------------------------------------- If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU. Please see http://www.coreboot.org/QEMU for details. Website and Mailing List ------------------------ Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website: http://www.coreboot.org You can contact us directly on the coreboot mailing list: http://www.coreboot.org/Mailinglist Copyright and License --------------------- The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details. coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files (mostly those derived from the Linux kernel) are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details. This makes the resulting coreboot images licensed under the GPL, version 2.