14e2277962
while others dislike them being extra commits, let's clean them up once and for all for the existing code. If it's ugly, let it only be ugly once :-) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
119 lines
3.9 KiB
Text
119 lines
3.9 KiB
Text
##
|
|
## This file is part of the coreboot project.
|
|
##
|
|
## Copyright (C) 2007 AMD
|
|
## Written by Yinghai Lu <yinghailu@amd.com> for AMD.
|
|
##
|
|
## This program is free software; you can redistribute it and/or modify
|
|
## it under the terms of the GNU General Public License as published by
|
|
## the Free Software Foundation; either version 2 of the License, or
|
|
## (at your option) any later version.
|
|
##
|
|
## This program is distributed in the hope that it will be useful,
|
|
## but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
## GNU General Public License for more details.
|
|
##
|
|
## You should have received a copy of the GNU General Public License
|
|
## along with this program; if not, write to the Free Software
|
|
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
|
##
|
|
|
|
entries
|
|
|
|
#start-bit length config config-ID name
|
|
#0 8 r 0 seconds
|
|
#8 8 r 0 alarm_seconds
|
|
#16 8 r 0 minutes
|
|
#24 8 r 0 alarm_minutes
|
|
#32 8 r 0 hours
|
|
#40 8 r 0 alarm_hours
|
|
#48 8 r 0 day_of_week
|
|
#56 8 r 0 day_of_month
|
|
#64 8 r 0 month
|
|
#72 8 r 0 year
|
|
#80 4 r 0 rate_select
|
|
#84 3 r 0 REF_Clock
|
|
#87 1 r 0 UIP
|
|
#88 1 r 0 auto_switch_DST
|
|
#89 1 r 0 24_hour_mode
|
|
#90 1 r 0 binary_values_enable
|
|
#91 1 r 0 square-wave_out_enable
|
|
#92 1 r 0 update_finished_enable
|
|
#93 1 r 0 alarm_interrupt_enable
|
|
#94 1 r 0 periodic_interrupt_enable
|
|
#95 1 r 0 disable_clock_updates
|
|
#96 288 r 0 temporary_filler
|
|
0 384 r 0 reserved_memory
|
|
384 1 e 4 boot_option
|
|
385 1 e 4 last_boot
|
|
386 1 e 1 ECC_memory
|
|
388 4 r 0 reboot_bits
|
|
392 3 e 5 baud_rate
|
|
395 1 e 1 hw_scrubber
|
|
396 1 e 1 interleave_chip_selects
|
|
397 2 e 8 max_mem_clock
|
|
399 1 e 2 multi_core
|
|
400 1 e 1 power_on_after_fail
|
|
412 4 e 6 debug_level
|
|
416 4 e 7 boot_first
|
|
420 4 e 7 boot_second
|
|
424 4 e 7 boot_third
|
|
428 4 h 0 boot_index
|
|
432 8 h 0 boot_countdown
|
|
440 4 e 9 slow_cpu
|
|
444 1 e 1 nmi
|
|
445 1 e 1 iommu
|
|
728 256 h 0 user_data
|
|
984 16 h 0 check_sum
|
|
# Reserve the extended AMD configuration registers
|
|
1000 24 r 0 amd_reserved
|
|
|
|
|
|
|
|
enumerations
|
|
|
|
#ID value text
|
|
1 0 Disable
|
|
1 1 Enable
|
|
2 0 Enable
|
|
2 1 Disable
|
|
4 0 Fallback
|
|
4 1 Normal
|
|
5 0 115200
|
|
5 1 57600
|
|
5 2 38400
|
|
5 3 19200
|
|
5 4 9600
|
|
5 5 4800
|
|
5 6 2400
|
|
5 7 1200
|
|
6 6 Notice
|
|
6 7 Info
|
|
6 8 Debug
|
|
6 9 Spew
|
|
7 0 Network
|
|
7 1 HDD
|
|
7 2 Floppy
|
|
7 8 Fallback_Network
|
|
7 9 Fallback_HDD
|
|
7 10 Fallback_Floppy
|
|
#7 3 ROM
|
|
8 0 200Mhz
|
|
8 1 166Mhz
|
|
8 2 133Mhz
|
|
8 3 100Mhz
|
|
9 0 off
|
|
9 1 87.5%
|
|
9 2 75.0%
|
|
9 3 62.5%
|
|
9 4 50.0%
|
|
9 5 37.5%
|
|
9 6 25.0%
|
|
9 7 12.5%
|
|
|
|
checksums
|
|
|
|
checksum 392 983 984
|
|
|
|
|