coreboot-kgpe-d16/src/soc/amd/stoneyridge
Richard Spiegel b40e193948 soc/amd/stoneyridge: Access SMBUS through MMIO
Currently SMBUS registers are accessed through IO, but with stoneyridge
they can be accessed through MMIO. This reduces the time of execution by
a tiny amount (MMIO write is faster than IO write, though MMIO read is about
as fast as IO read) as most of the time consumed is actually transaction
time. Convert code to MMIO access.

BUG=b:117754784
TEST=Used IO to write and MMIO to read, to confirm a one to one relationship
between IO and MMIO. Then build and boot grunt.

Change-Id: Ibe1471d1d578611e7d666f70bc97de4c3b74d7f8
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/c/29258
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2019-01-30 11:01:37 +00:00
..
acpi soc/amd/stoneyridge: Name IO061 in ASL appropriately 2018-12-05 14:06:32 +00:00
bootblock src: Move shared amd64 and IA32 MSRs to <cpu/x86/msr.h> 2018-10-30 20:20:00 +00:00
include/soc soc/amd/stoneyridge: Access SMBUS through MMIO 2019-01-30 11:01:37 +00:00
acpi.c soc/amd/stoneyridge: Use new ACPI MMIO functions 2018-12-03 13:21:35 +00:00
BiosCallOuts.c device: Use pcidev_path_on_root() 2019-01-06 13:09:54 +00:00
chip.c soc/{amd,intel}: Remove needless '&' on function pointers 2019-01-23 14:42:59 +00:00
chip.h mb/google/kahlee: Tune eDP panel initialization time 2018-11-09 09:15:11 +00:00
cpu.c soc/amd/stoneyridge: Fix get_cpu_count() 2018-10-31 22:00:03 +00:00
enable_usbdebug.c soc/amd/stoneyridge: Define PM USB Enable register 2018-10-14 19:11:54 +00:00
finalize.c cpu/amd: Use common AMD's MSR 2018-10-18 12:51:26 +00:00
gpio.c amd/stoneyridge: Disable GPIO MASK STATUS 2019-01-28 13:35:44 +00:00
hda.c src: Remove unneeded include <console/console.h> 2018-11-16 09:50:29 +00:00
i2c.c device: Use pcidev_path_on_root() 2019-01-06 13:09:54 +00:00
iommu.c soc/amd/stoneyridge: Add IOMMU support 2018-10-03 21:34:20 +00:00
Kconfig console: Change BOOTBLOCK_CONSOLE default to y 2019-01-14 12:13:55 +00:00
lpc.c src/(device/lib/soc): Remove unused variables 2018-12-05 14:05:23 +00:00
Makefile.inc usbdebug: Make the EHCI debug console work in the bootblock 2019-01-06 14:05:20 +00:00
mca.c src: Move shared amd64 and IA32 MSRs to <cpu/x86/msr.h> 2018-10-30 20:20:00 +00:00
monotonic_timer.c
nb_util.c pci: Move inline PCI functions to pci_ops.h 2018-04-20 13:03:54 +00:00
northbridge.c src/(device/lib/soc): Remove unused variables 2018-12-05 14:05:23 +00:00
pmutil.c soc/amd/stoneyridge: Use new ACPI MMIO functions 2018-12-03 13:21:35 +00:00
ramtop.c soc/amd/stoneyridge: Remove "else" after a return 2018-10-25 16:16:25 +00:00
reset.c soc/amd: Implement common reset API 2018-10-22 08:34:56 +00:00
romstage.c device: Use pcidev_path_on_root() 2019-01-06 13:09:54 +00:00
sata.c src: Remove unneeded include <console/console.h> 2018-11-16 09:50:29 +00:00
sb_util.c soc/amd/stoneyridge: Access SMBUS through MMIO 2019-01-30 11:01:37 +00:00
sm.c soc/amd/stoneyridge: Access SMBUS through MMIO 2019-01-30 11:01:37 +00:00
smbus.c soc/amd/stoneyridge: Access SMBUS through MMIO 2019-01-30 11:01:37 +00:00
smbus_spd.c soc/amd/stoneyridge: Access SMBUS through MMIO 2019-01-30 11:01:37 +00:00
smi.c src: Remove unneeded include "{arch,cpu}/cpu.h" 2018-11-12 09:22:18 +00:00
smi_util.c src/soc: Add and update license headers 2018-05-29 22:36:10 +00:00
smihandler.c amd/stoneyridge: Clear SMI_EVENT_STATUS when entering S3/S5 2018-12-19 16:05:20 +00:00
southbridge.c soc/amd/stoneyridge: Access SMBUS through MMIO 2019-01-30 11:01:37 +00:00
spi.c src/soc/amd/stoneyridge: Remove IMC support 2018-07-31 00:46:07 +00:00
tsc_freq.c cpu/amd: Use common AMD's MSR 2018-10-18 12:51:26 +00:00
uart.c
usb.c Move compiler.h to commonlib 2018-10-08 16:57:27 +00:00