Ryan Chuang 43a3aa0cf4 vc/mediatek/mt8195: Optimize DRAM init time by reducing I2C I/O ... Disable reading of vdram/vddq/vmddr to reduce access of I2C to reduce DRAM init time by about 30ms. The values were only needed by HQA report and not needed on production units. BUG=b:195274787 Signed-off-by: Ryan Chuang <ryan.chuang@mediatek.corp-partner.google.com> Change-Id: I32cd68fb8b52cec6e145d6772475fde0130ca6ac Reviewed-on: https://review.coreboot.org/c/coreboot/+/56850 Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2021-08-09 01:53:56 +00:00
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amd	soc/amd/cezanne: enable crypto in psp_verstage	2021-07-21 16:53:17 +00:00
cavium	src: use ARRAY_SIZE where possible	2021-02-15 11:30:40 +00:00
eltan	src/vendorcode/eltan: Don't reference CONFIG_CBFS_SIZE	2021-07-28 08:19:30 +00:00
google	timestamp,vc/google/chromeos/cr50: Add timestamp for enable update	2021-07-05 10:50:06 +00:00
intel	vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2265_01	2021-07-30 17:32:49 +00:00
mediatek	vc/mediatek/mt8195: Optimize DRAM init time by reducing I2C I/O	2021-08-09 01:53:56 +00:00
siemens	cbfs: Simplify load/map API names, remove type arguments	2020-12-02 22:13:17 +00:00
Makefile.inc	soc/mediatek/mt8192: initialize DRAM using vendor reference code	2021-03-08 03:15:43 +00:00