b508a858b5
BUG=chrome-os-partner:33646 BRANCH=ToT TEST=Built storm. Change-Id: I4b2cb54369dee7e6e61c2173d2be0f50430123fb Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 0aab7fe31b78bae264cc2e6fa04fe7047315d08f Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Change-Id: Ic509e1fd375a320b8e37a07a7f5b9a6fa211ace3 Original-Reviewed-on: https://chromium-review.googlesource.com/229427 Original-Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Original-Commit-Queue: Vadim Bendebury <vbendeb@chromium.org> Original-Tested-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: http://review.coreboot.org/9680 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
38 lines
927 B
Text
38 lines
927 B
Text
config SOC_QC_IPQ806X
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bool
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default n
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select ARCH_BOOTBLOCK_ARMV7
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select ARCH_VERSTAGE_ARMV7
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select ARCH_ROMSTAGE_ARMV7
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select ARCH_RAMSTAGE_ARMV7
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select ARM_LPAE
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select BOOTBLOCK_CONSOLE
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select DYNAMIC_CBMEM
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select HAVE_UART_SPECIAL
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select SPI_ATOMIC_SEQUENCING
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if SOC_QC_IPQ806X
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config CBFS_SIZE
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hex "Size of CBFS filesystem in ROM"
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default ROM_SIZE
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help
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CBFS size needs to match the size of memory allocated to the
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coreboot blob elsewhere in the system. Make sure this config option
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is fine tuned in the board config file.
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config MBN_ENCAPSULATION
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depends on USE_BLOBS
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bool "bootblock encapsulation for ipq8064"
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default y
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config SBL_BLOB
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depends on USE_BLOBS
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string "file name of the Qualcomm SBL blob"
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default "3rdparty/cpu/qualcomm/ipq806x/uber-sbl.mbn"
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help
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The path and filename of the binary blob containing
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ipq806x early initialization code, as supplied by the
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vendor.
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endif
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