Sean Rhodes b5b22a74a6 soc/intel: Don't send CSE EOP if CSME is disabled ... CSE EOP will fail if the CSE is disabled (CB:52800) Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ic00fdb0d97fefac977c0878d1d5893d07d4481ea Reviewed-on: https://review.coreboot.org/c/coreboot/+/57149 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>		2021-11-01 16:13:31 +00:00
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acpi	acpi/acpigen.c: Remove weak gpio definition	2021-10-29 00:52:50 +00:00
arch	arch/x86: fix a wrong variable in ioapic_set_max_vectors()	2021-10-23 16:33:58 +00:00
commonlib	commonlib: Add new TS for IA pre-cpu reset entities	2021-11-01 15:53:57 +00:00
console	src/acpi to src/lib: Fix spelling errors	2021-10-05 18:06:39 +00:00
cpu	src/cpu: drop CPU_X86_CACHE_HELPER and x86_enable_cache wrapper function	2021-10-26 20:27:22 +00:00
device	src/acpi to src/lib: Fix spelling errors	2021-10-05 18:06:39 +00:00
drivers	drivers/intel/fsp2_0: Check return type against CB_SUCCESS	2021-10-30 13:12:43 +00:00
ec	ec/google/chromeec: Register USB-C mux operations	2021-10-06 22:20:32 +00:00
include	soc/intel/common: Add DDR5 and LPDDR5 into the SMBIOS table	2021-10-30 18:45:09 +00:00
lib	lib: Use `smbios_bus_width_to_spd_width` for setting dimm.bus_width	2021-10-30 18:44:19 +00:00
mainboard	soc/intel/braswell: Set GNVS DPTE via devicetree	2021-11-01 16:02:13 +00:00
northbridge	AGESA binaryPI: Use common acpi_fill_madt()	2021-10-22 14:28:27 +00:00
security	security/intel/txt: Get addr bits at runtime	2021-11-01 15:59:54 +00:00
soc	soc/intel: Don't send CSE EOP if CSME is disabled	2021-11-01 16:13:31 +00:00
southbridge	arch/x86/ioapic: Select IOAPIC with SMP	2021-10-22 14:18:45 +00:00
superio	src/soc to src/superio: Fix spelling errors	2021-10-05 18:07:08 +00:00
vendorcode	vc/mediatek/mt8195: Remove unused code and comments	2021-11-01 15:57:11 +00:00
Kconfig	arch/x86/ioapic: Select IOAPIC with SMP	2021-10-22 14:18:45 +00:00